SNVSAF7C August   2016  – October 2025 LM27762

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout
      2. 6.3.2 Input Current Limit
      3. 6.3.3 PFM Operation
      4. 6.3.4 Output Discharge
      5. 6.3.5 Power-Good Output (PGOOD)
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Enable Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Positive Low-Dropout Linear Regulator and OUT+ Voltage Setting
        2. 7.2.2.2 Charge-Pump Voltage Inverter
        3. 7.2.2.3 Negative Low-Dropout Linear Regulator and OUT– Voltage Setting
        4. 7.2.2.4 External Capacitor Selection
          1. 7.2.2.4.1 Charge-Pump Output Capacitor
          2. 7.2.2.4.2 Input Capacitor
          3. 7.2.2.4.3 Flying Capacitor
          4. 7.2.2.4.4 LDO Output Capacitor
        5. 7.2.2.5 Power Dissipation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.2.2 Charge-Pump Voltage Inverter

The main application of the LM27762 is to generate a regulated negative supply voltage. The voltage inverter circuit uses only three external capacitors, and the LDO regulator circuit uses one additional output capacitor.

The voltage inverter portion of the LM27761 contains four large CMOS switches which are switched in sequence to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 7-2 shows the voltage switches S2 and S4 are open. In the second time interval, S1 and S3 are open; at the same time, S2 and S4 are closed, and C1 is charging CCP. After a number of cycles, the voltage across CCP is pumped into VIN. Because the anode of CCP is connected to ground, the output at the cathode of CCP equals –(VIN) when there is no load current. When a load is added, the output voltage drop is determined by the parasitic resistance (RDSON of the MOSFET switches and the equivalent series resistance (ESR) of the capacitors) and the charge transfer loss between the capacitors.

LM27762 Voltage Inverting PrincipleFigure 7-2 Voltage Inverting Principle

The output characteristic of this circuit can be approximated by an ideal voltage source in series with a resistance. The voltage source equals –(VIN). The output resistance ROUT is a function of the ON resistance of the internal MOSFET switches, the oscillator frequency, the capacitance, and the ESR of C1 and CCP. Because the switching current charging and discharging C1 is approximately twice as the output current, the effect of the ESR of the pumping capacitor C1 is multiplied by four in the output resistance. The charge-pump output capacitor CCP is charging and discharging at a current approximately equal to the output current; therefore, its ESR only counts once in the output resistance. A good approximation of charge-pump ROUT is shown in Equation 2:

Equation 2. ROUT = (2 × RSW) + [1 / (ƒSW × C1)] + (4 × ESRC1) + ESRCCP

where

  • RSW is the sum of the ON resistance of the internal MOSFET switches shown in Figure 7-2.

High capacitance and low-ESR ceramic capacitors reduce the output resistance.