SNVSAF7C August   2016  – October 2025 LM27762

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout
      2. 6.3.2 Input Current Limit
      3. 6.3.3 PFM Operation
      4. 6.3.4 Output Discharge
      5. 6.3.5 Power-Good Output (PGOOD)
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Enable Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Positive Low-Dropout Linear Regulator and OUT+ Voltage Setting
        2. 7.2.2.2 Charge-Pump Voltage Inverter
        3. 7.2.2.3 Negative Low-Dropout Linear Regulator and OUT– Voltage Setting
        4. 7.2.2.4 External Capacitor Selection
          1. 7.2.2.4.1 Charge-Pump Output Capacitor
          2. 7.2.2.4.2 Input Capacitor
          3. 7.2.2.4.3 Flying Capacitor
          4. 7.2.2.4.4 LDO Output Capacitor
        5. 7.2.2.5 Power Dissipation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.1 Overview

The LM27762 low-noise, inverting charge pump with both positive and negative LDOs delivers very low-noise adjustable positive and negative outputs between ±1.5 V and ±5 V. The output voltage levels of the positive and negative LDO are independently controllable with external resistors. Input voltage range of LM27762 is from 2.7 V to 5.5 V. Five low-cost capacitors are used in this circuit to provide up to ±250 mA of output current. The LM27762 operates at 2-MHz (typical) switching frequency to reduce output resistance and voltage ripple. With an typical operating current of only 390 µA and 0.5-µA typical shutdown current, the LM27762 provides ideal performance for power amplifiers and DAC bias and other high-current, low-noise negative voltage needs.

The LM27762 device has an enable input (EN+) for the positive LDO and another enable input (EN–) for the negative charge pump and LDO. This supports independent timing for the positive and negative rails in system power sequence. Enable inputs can be also shorted together and connected to VIN. When LDO is disabled, output of the positive LDO has 50-kΩ pulldown to ground, and output of the negative LDO has 50-kΩ pullup to ground. The LM27762 has power good monitoring for OUT+ and OUT– outputs. The PGOOD pin is an open-drain output and requires an external pullup resistor. When the Power-Good feature is not used, the PGOOD pin can be connected to ground.