SPRACK2A September 2019 – March 2020 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
The ERAD module has a number of changes between F28004x and F28002x as highlighted in Table 14.
| Module | Category | F28004x | F28002x | Note |
|---|---|---|---|---|
| ERAD | Features | - | Event Masking and Exporting | EBC Unit on F28002x supports event OR/AND, masking and exporting |
| - | Cumulative Mode | SEC Unit on F28002x supports a cummulative mode over several start/stop events | ||
| - | CRC Unit | F28002x has CRC units to monitor CPU buses and compute CRC when self-test code is executed | ||
| 32 Event Selector Options | 128 Event Selector Options | Connections to ADC, CMPSS, EPWM and other sources have been added to F28002x | ||
| Registers | - | GLBL_NMI_CTL | Global Debug NMI Control | |
| - | GLBL_EVENT_AND_MASK | Global Bus Comparator Event AND Mask Register | ||
| - | GLBL_EVENT_OR_MASK | Global Bus Comparator Event OR Mask Register | ||
| - | GLBL_AND_EVENT_INT_MASK | Global AND Event Interrupt Mask Register | ||
| - | GLBL_OR_EVENT_INT_MASK | Global OR Event Interrupt Mask Register | ||
| - | CTM_INPUT_SEL_2 | Counter Input Select Extension Register | ||
| - | CTM_INPUT_COND | Counter Input Conditioning Register | ||
| - | CRC_GLOBAL_CTRL | CRC Global Control Register | ||
| - | CRC_CURRENT | Reads Current CRC Value | ||
| - | CRC_SEED | CRC Seed Register | ||
| - | CRC_QUALIFIER | CRC Compute Qualification Register |