SPRADN2 January   2025 MSPM0G1518 , MSPM0G1519 , MSPM0G3518 , MSPM0G3519 , MSPM0L1227 , MSPM0L1228 , MSPM0L2227 , MSPM0L2228

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Nonvolatile Memory (NVM) Basic Introduction
    1. 1.1 Flash Memory Protection
  5. 2Customer Secure Code (CSC) Introduction
    1. 2.1 CSC Execution Overview
    2. 2.2 CSC Memory Maps
    3. 2.3 CSC Execution Process
  6. 3Bank Swap Example Implementation
    1. 3.1 CSC Code Project Preparation
      1. 3.1.1 Enable CSC in NONMAIN
      2. 3.1.2 Implementation of CSC Application Code - Bank Swap Feature
    2. 3.2 Application Code Project Preparation
  7. 4Common Use Case Introduction
  8. 5Data Bank Introduction
    1. 5.1 Data Bank Protection
    2. 5.2 Data Bank Erase Write Operation
  9. 6Summary
  10. 7References

Abstract

With the growing demand of applications such as automotive systems which have strict real-time needs, accessing critical information about the system functionality is necessary before the completion of a Flash memory erase or program operation. Applications need a firmware upgrade, especially when the system power loss occurs during the update process. This can result in many problems such as a transmission error or an information loss. For these reasons, TI offers MSPM0 MCUs that embed dual bank Flash memories designed to respond to the above needs. The dual bank Flash memory allows a code to be executed in one bank, while another bank is being erased or programmed. This avoids a CPU stalling during programming operations and protects the system from power failures or other errors. This application note gives an overview of the MSPM0L, MSPM0G Series Flash memory dual bank capabilities, and shows how to implement Bank Swap function on customer project.