The c_RxInterleaveCtrl, c_HsiMode, and z_HsiAChirpDataCfgLst parameters in T_ML_MSS_DATAPATH_CFG are related to CSI2 output data content/format.

The c_RxInterleaveCtrl parameter sets the interleaved mode control for receive channels. The AWR2188 only supports the non-interleaved mode, so this parameter is set to 1 accordingly. Below is an example of data output in non-interleaved mode, where Rx0, Rx1, Rx2, Rx3, Rx4, Rx5, Rx6, and Rx7 represent different receive channels. The number following the receive channel indicates the number of sampling points for that channel. The number of sampling points per chirp is N+1, for example:

Rx00 Rx01 Rx02 Rx03.....Rx0N Rx10 Rx11 Rx12 Rx13.......Rx3N

The c_HsiMode parameter specifies the contents of the CSI2 data output, which is configured to 0xAA (Sensor Data Mode) for normal wave transmission.

The z_HsiAChirpDataCfgLst parameter is the configuration table for the AWR2188 in sensor mode. This configuration table is used to specify the form of each chirp data output over the CSI2 interface. Each long packet over CSI2 has a corresponding linked list entry description, supporting a maximum of 16 linked list entries. The contents of each entry can be specified by the user, mainly including:

• Whether to include Hsync start or Hsync end in the CSI2 packet (i.e., line start/end short packets over CSI2);
• Whether to include a long packet header;
• The virtual channel (VC channel) number used;
• The data format over CSI2, such as RAW8 (16-bit ADC), RAW12 (12-bit ADC), or RAW14 (14-bit ADC);
• The CBUFF data format;
• The contents in long packets, such as receive channels (RX0–RX7), CP (chirp profile), and CQ (chirp quality).

It is generally recommended that the user configure at least eight z_HsiAChirpDataCfgLst instances to specify the data output format over eight receive channels (RXs), with extra instances to be added when CP or CQ data is included. Table 3-4 and Table 3-5 provide partial linked list reference configuration examples for 16-bit ADC (with CP) and 12-bit ADC.

The CSI2 output configuration of the AWR2188 is flexible, allowing better adaptation to different back-end chips, such as serializers, processors, and so forth. If the back-end chip has restrictions on the data size per line of CSI2 frames, the user can divide the data of one chirp into two or more lines for output, thereby reducing the amount of data per line and ensuring that the back-end chip receives it properly. Each long packet incurs about 3us of CSI protocol overhead. This overhead must be considered by extending the chirp idle time appropriately when the user divides chirp data into multiple lines for output. Table 3-6 shows a configuration scheme where the data of one chirp over eight receive channels is output in two lines. In this scheme, the data over Rx0 to Rx3 forms one line, and the data over Rx4 to Rx7 forms the other line.