SPRUII7B June   2018  – April 2020 TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1

 

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2.1.10 PGA

The F28004x MCU features on-chip Programmable Gain Amplifiers (PGA) to amplify an input voltage for increasing the dynamic range of the downstream ADC and CMPSS modules. The integrated PGA helps to reduce the cost and design effort for many control applications that traditionally require external, stand-alone amplifiers. On-chip integration ensures that the PGA is compatible with the downstream ADC and CMPSS modules. Software selectable gain and filter settings make the PGA adaptable to various performance needs. For more information on the PGAs, see the device-specific data sheet and TRM.

The F28004x LaunchPad was designed to optimize the routing of certain PGA signals to the BoosterPack connectors. This design choice allows for the evaluation of the on-chip PGA, if desired. Three PGA modules are routed each BoosterPack Connector. An RC filter can be placed on each of these signals to provide additional filtering of the input signal. By default, 0 Ω series resistor and pads for a decoupling capacitor are placed on each PGA input signal. These values can be modified based on application requirements.

In addition to the PGA input signals, BoosterPack site 2 has the associated output filter signals routed. Each output filter signal has two components: a 0 Ω series resistor and a decoupling capacitor. If the PGA output filters are used, remove the 0 Ω series resistor to isolate it from the BoosterPack connector, and place an appropriate filter capacitor. By default, a 330 pF capacitor is populated. An isolated ground plane for the PGAs has been created to help limit outside noise coupling onto the PGA signals. By default, this ground plane is shorted to the ground plane of the PCB through a resistor. If isolation between PGAx_GND and the PCB ground is needed the resistor can be removed.

Wherever a PGA signal is brought to the BoosterPack connector, an ADC input is also provided. Depending on the signal, the ADC is connected by either a short on the board or through on-chip connections. Other than PGA4_IN and PGA6_IN, each PGA input signal can be isolated from the connected ADC signal by removing the 0 Ω resistor that is part of the input RC filter.

Table 3 summarizes the available PGA signals and connections. For the full connection details, see Sheet 4 of the board schematic.

Table 3. PGA Signals and Associated Connections

BoosterPack Site Pin Position PGA Signal ADC Input Signal Note
1 J3.27 PGA1_IN ADCINB2 Populate RC filter if required
J3.28 PGA3_IN ADCINC0 Populate RC filter if required
J3.29 PGA5_IN ADCINA9 Populate RC filter if required
J1.2 PGA1/3/5_GND – Connected to PCB GND by default. Remove R26 is PGA_GND isolation is required
2 J7.29 (69) PGA2_IN ADCINA3 Populate RC filter if required
J5.6 (46) PGA2_OF ADCINA4 Remove R19 if PGA output filter is required
J7.27 (67) PGA4_IN ADCINC3 Populate RC filter if required
J5.5 (45) PGA4_OF ADCINB4 Remove R25 if PGA output filter is required
J7.28 (68) PGA6_IN ADCINC5 Populate RC filter if required
J5.8 (48) PGA6_OF ADCINA8 Remove R22 if PGA output filter is required
J5.2 (42) PGA2/4/6_GND – Connected to PCB GND by default. Remove R27 is PGA_GND isolation is required