SPRUIT1B May   2020  – November 2020

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Key Features
  3. 2GESI Expansion Board Overview
    1. 2.1 GESI Expansion Board Identification
    2. 2.2 GESI Expansion Board Component Identification
  4. 3GESI Expansion Board - User Setup/Configuration
    1. 3.1 GESI Infotainment Expansion Board With CP Board
      1. 3.1.1 Board Assembly Procedures
    2. 3.2 Power Requirements
    3. 3.3 EVM Reset/Interrupt Push Buttons
    4. 3.4 EVM Configuration DIP Switch
  5. 4GESI Expansion Board Hardware Architecture
    1. 4.1  GESI Expansion Board Hardware Top Level Diagram
    2. 4.2  Expansion Connectors
    3. 4.3  Board ID EEPROM
    4. 4.4  Ethernet Interface
      1. 4.4.1 RGMII Clocking Scheme
      2. 4.4.2 Ethernet Port LED Indication
    5. 4.5  PROFI BUS / RS485
    6. 4.6  LIN Interface
    7. 4.7  MCAN
    8. 4.8  MUX Selection
      1. 4.8.1 MUX – PRGx_MDIO/MDC, CPSW9G_MDIO/MDC
      2. 4.8.2 MUX – PRG1_RGMII1/PRG1_PWM
      3. 4.8.3 MUX – PRG1_PWM/MCAN
      4. 4.8.4 MUX_MC/BP_SEL
    9. 4.9  GESI LaunchPad-Booster Pack Interface
    10. 4.10 Motor Control Interface
    11. 4.11 USS/IMU Header
    12. 4.12 Test Header
  6.   A Interface Mapping
  7.   B GESI Board GPIO Mapping
  8.   C I2C Address Mapping
  9.   D Revision History

4.12 Test Header

Table 4-10 contains the pin out details of Test header. Test Header on GESI Board is shown in Figure 4-19.

Table 4-10 Pin Outs of J22 (Test Header) Connector
J22 Connector Pin Outs
Pin Net Name Pin Net Name
1 TH_EHRPWM0_SYNCI 9 EHRPWM0_B
2 EHRPWM1_B 10 EHRPWM_TZn_IN2
3 TH_EHRPWM0_SYNCO 11 EHRPWM1_A
4 EHRPWM_TZn_IN1 12 TH_UART4_RTSn
5 TH_EHRPWM_TZn_IN0 13 TH_UART4_TXD
6 EHRPWM2_A 14 TH_UART4_RXD
7 EHRPWM0_A 15 TH_UART4_CTSn
8 EHRPWM2_B 16 DGND
GUID-ACDCD525-94BE-40D1-96F2-F1036DE64F73-low.jpg Figure 4-19 Test Header