SPRUJA1A October   2023  – December 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 EVM Revisions and Assembly Variants
    5. 1.5 Specification
  7. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Key Features
      1. 2.2.1 Processor
      2. 2.2.2 Power Supply
      3. 2.2.3 Memory
      4. 2.2.4 JTAG/Emulator
      5. 2.2.5 Support Interfaces and Peripherals
      6. 2.2.6 Expansion Connectors/Headers
    3. 2.3  Power
      1. 2.3.1 Power Requirements
      2. 2.3.2 Power Input
      3. 2.3.3 Power Supply
      4. 2.3.4 Power Sequencing
      5. 2.3.5 AM62x SIP SoC Power
      6. 2.3.6 Current Monitoring
    4. 2.4  Power ON/OFF Procedure
      1. 2.4.1 Power ON Procedure
      2. 2.4.2 Power OFF Procedure
      3. 2.4.3 Power Test Points
    5. 2.5  Interface Mapping
    6. 2.6  Clocking
      1. 2.6.1 Peripheral Ref Clock
    7. 2.7  Reset
    8. 2.8  CSI Interface
    9. 2.9  Audio Codec Interface
    10. 2.10 HDMI Display Interface
    11. 2.11 JTAG Interface
    12. 2.12 Test Automation Header
    13. 2.13 UART Interface
    14. 2.14 USB Interface
      1. 2.14.1 USB 2.0 Type A Interface
      2. 2.14.2 USB 2.0 Type C Interface
    15. 2.15 Memory Interfaces
      1. 2.15.1 OSPI Interface
      2. 2.15.2 MMC Interfaces
        1. 2.15.2.1 MMC0 - eMMC Interface
        2. 2.15.2.2 MMC1 - Micro SD Interface
        3. 2.15.2.3 MMC2 - M.2 Key E Interface
      3. 2.15.3 Board ID EEPROM
    16. 2.16 Ethernet Interface
      1. 2.16.1 CPSW Ethernet PHY 1 Default Configuration
      2. 2.16.2 CPSW Ethernet PHY 2 Default Configuration
    17. 2.17 GPIO Port Expander
    18. 2.18 GPIO Mapping
    19. 2.19 OLDI Display Interface
    20. 2.20 EVM User Setup/Configuration
      1. 2.20.1 EVM DIP Switches
      2. 2.20.2 Boot Modes
      3. 2.20.3 User Test LEDs
    21. 2.21 Expansion Headers
      1. 2.21.1 PRU Connector
      2. 2.21.2 User Expansion Connector
      3. 2.21.3 MCU Connector
    22. 2.22 Interrupt
    23. 2.23 I2C Address Mapping
  8. 3Hardware Design Files
  9. 4Compliance Information
    1. 4.1 Compliance and Certifications
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
      1. 5.1.1 Issue 1 - OLDI Display Touch Broken
    2. 5.2 Trademarks
    3.     75
  11. 6Revision History

2.3.5 AM62x SIP SoC Power

The core voltage of the AM62x SIP can be 0.75V or 0.85V based on the Rfb (R150) resistor value and the power optimization requirement. By default, Rfb = 41.2K is mounted (VDD_CORE = 0.85V), and can be changed to 0.75V by changing the Rfb to 24.9K. Current monitors are provided on all the SoC power rails.

The SoC has different IO groups. Each IO group is powered by specific power supplies as shown in the table below.

Table 2-3 SoC Power Supply
Sl.No Power Supply SoCSupply Rails IO Power Group Voltage
1 VDD_CORE VDDA_CORE_USB 0.85
VDDA_CORE_CSI
VDD_CANUART CANUART
VDD_CORE CORE
VDDR_CORE CORE

2

VDDA_1V8

 VDDA_1V8_CSIRX. CSI

1.8
VDDA_1V8_USB USB
VDDA_1V8_MCU
VDDA_1V8_OLDI OLDI
VDDA_1V8_OSCO OSCO
VDDS_MEM_1P8 DDR
VDDA_PLL0, VDDA_PLL1 &VDDA_PLL2

3

VDD_DDR

 VDDS_DDR

DDR0

1.1
VDDS_DDR_MEM
5 VPP_1V8 VPP_1V8 1.8
6 SoC_VDDSHV5_SDIO VDDSHV5 MMC1

7

SoC_DVDD1V8

 VDDSHV0 General

1.8
VDDSHV1 OSPI
VDDSHV4 MMC0
VDDSHV6 MMC2
VMON_1P8_SOC

8

SoC_DVDD3V3

 VDDSHV0 General

3.3
VDDSHV2 RGMII
VDDSHV3 GPMC
VDDSHV_MCU MCU General
VMON_3P3_SOC
VDDA_3P3_USB USB