SPRUJG5 January 2025
DP83867-EVM-AM is equipped with multiple test points for hardware debug and bench testing. Table 2-2 shows the test points on the board and their associated signal net.
| Test Point | Signal | Description |
|---|---|---|
| TP1 | VCC | RJ45 VCC |
| TP2 | VDDA1P8 | Analog 1.8V Input |
| TP3 | ETH_LED0 | Link established indicator |
| TP4 | CLK_OUT | ETH PHY Ref. Clk out |
| TP5 | EXT_VMON | External voltage monitor |
| TP6 | ETH_GPIO0 | PHY GPIO0 |
| TP7 | ETH_GPIO1 | PHY GPIO1 |
| TP8 | VDD_1V0 | 1.0V LDO Output |
| TP9 | INH | Inhibit |
| TP10 | 1588_SFD | 1588 Start of frame |
| TP11 | COL | Collision detected |
| TP12 | CRS | Carrier sense |
| TP13 | RX_ER | Receive error |