Details

The device JTAG port may unexpectedly be connected to the Boundary Scan TAP rather than the On-Chip Debug TAP (SWJ-DP) while using a JTAG debugger when the EMU1 pin is configured for the MCU_OBSCLK0 signal function. This will render the normal JTAG debugging mode inoperable

This occurs because the device selects the Boundary Scan TAP when a value of 01b is sampled on the EMU[1:0] inputs on the rising edge to TRSTn. This value will be driven into the SOC when MCU_PADCONFIG32 is configured for any mux mode value other than mode “0” and MCU_PADCONFIG31 is configured for a mux mode value of “0” with the EMU0 pin pulled high.

• The EMU1 signal going into the SOC is driven low by the multiplexing logic when the EMU1 signal function is not selected.
• The EMU0 signal going into the SOC is driven high by internal and external pull-ups.
• The JTAG debugger de-asserts TRSTn when attempting to communicate with the On-Chip DebugTAP (SWJ-DP).

Workaround

This issue will only occur when the device samples a value of 01b on the SOC EMU[1:0] inputs on the rising edge of TRSTn. This condition can be avoided with any one or more of the following actions.

• Never connect a debugger to the JTAG port when the EMU1 pin is being used for the MCU_OBSCLK0 signal function.
• Configure the MCU_SPI0_CS1 pin for the MCU_OBSCLK0 signal function rather than the EMU1 pin, and leave the EMU1 pin in its default configuration.
• Configure the EMU0 pin to any mux mode other than “0” or “15” when configuring the EMU1 pin for the MCU_OBSCLK0 signal function. This causes the pin multiplexing logic to drive a EMU[1:0] value of 00b into the SOC, which will not select Boundary Scan mode.