SWRA682 December   2020 CC1310 , CC1312PSIP , CC1312R , CC1314R10 , CC1350 , CC1352P , CC1352P7 , CC1352R

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Recommended Test Setup
  4. 3 Overrides
  5. 4 Find the Needed RX BW
  6. 5 How to Set the Deviation
  7. 6 Theoretical Sensitivity
  8. 7 Determine AGC_REF Level
  9. 8 Determine Anti-Aliasing BW
  10. 9 Determine PA Ramp Settings
  11. 10Intermediate Frequency (IF)
  12. 11LNA Ib Offset
  13. 12Sensitivity and Selection of Sync Word
  14. 13Narrowband
    1. 13.1 Frequency Offset Tolerance
    2. 13.2 Low Datarate
    3. 13.3 Phase Noise
  15. 14RSSI Offset

9 Determine PA Ramp Settings

PA ramping is used to reduce splatter in the frequency domain when the PA starts and stops sending a packet. The target is that the PA as a maximum uses a time equal to 1 – 2 bits to do ramping. In addition relevant regulatory transient TX requirements should be considered.

The ramp up and down timing are set differently for CC13x0 and CC13x2.

The ramp up time should be measured using a spectrum analyzer using zero span and a positive trigger to capture the start of a packet. The sweep time should be adjusted to reflect the data rate to simplify the measurement.

The waiting time before ramping down should be measured with a spectrum analyzer using zero span and set the trigger to trig on negative flank. If the waiting time is too short the ramping down will be cut-off.

For CC13x0:

The ramping is controlled through two registers:

HW_REG_OVERRIDE(0x6088,0xXXYY)

HW_REG_OVERRIDE(0x608C,0xXXYY)

Where XX is the value that is possible to adjust. Table 9-1 shows the estimated ramp time as a function of settings.

Table 9-1 PA Ramp Times for CC13x0
0x6088 Override Value 0x608C Override Value Ramp Time [µs]
0x1F 0x3F 4
0x08 0x10 6
0x04 0x08 10
0x02 0x04 17
0x01 0x02 30
0x41 0x82 45
0x61 0x81 81
0xE1 0xC1 304

The actual ramp time should be measured.

For CC13x2:

The PA ramping up time is set by the following override:

ADI_2HALFREG_OVERRIDE(0,16,0x8,0xL,17,0x1,0xM), where L is least significant bit (8 or 0 to set as 1 or 0 respectively as L is bit[3] in the nibble) and M is most significant bit (1 or 0).

This means that it is a total of four possible PA ramp times.

The following override set the wait time before turning ramping off:

HW_REG_OVERRIDE(0x6028,0x00XX), where 0xXX is the wait time.