SWRZ150A December   2024  – October 2025 AWR2544

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Advisory to Silicon Variant / Revision Map
  6. 5Known Design Exceptions to Functional Specifications
    1.     MSS#25
    2.     MSS#27
    3.     MSS#28
    4.     MSS#29
    5.     MSS#30
    6.     MSS#33
    7.     MSS#40
    8. 5.1  MSS#49
    9. 5.2  MSS#52
    10. 5.3  MSS#53
    11. 5.4  MSS#54
    12. 5.5  MSS#55
    13. 5.6  MSS#56
    14. 5.7  MSS#57
    15. 5.8  MSS#58
    16. 5.9  MSS#59
    17. 5.10 MSS#60
    18. 5.11 MSS#61
    19. 5.12 MSS#62
    20. 5.13 MSS#63
    21. 5.14 MSS#64
    22. 5.15 MSS#65
    23.     MSS#68
    24.     MSS#71
    25. 5.16 ANA#12A
    26.     ANA#37A
    27.     ANA#39
    28.     ANA#43
    29.     ANA#44
    30.     ANA#45
    31.     ANA#47
    32.     ANA#59
  7.   Trademarks
  8. 6Revision History

MSS#25

Debugger May Display Unpredictable Data in the Memory Browser Window if a System Reset Occurs

Revision(s) Affected:

AWR2544

Description:

If a system reset (nRST goes low) occurs while the debugger is performing an access on the system resource using system view, a peripheral error should be replied to the debugger. If the access was a read, instead the response might indicate that the access completed successfully and return unpredictable data.

This issue occurs under this condition: when a system reset is asserted (nRST low) on a specific cycle, while the debugger is completing an access on the system, using the system view. An example would be, when a debugger, like the CCS-IDE memory browser window, is refreshing content using the system view. This is not an issue for a CPU only reset and, this is not an issue during a power-on-reset (nPORRST) either.

Workaround(s):

Avoid performing debug reads and writes while the device might be in reset.