TIDUDA6A December 2017 – January 2022
The LMK04828 is ultra-low noise JESD204B-compliant clock jitter cleaner with dual phase-locked loops (PLLs). The 14 outputs drive seven JESD204B devices or other logic devices. The dual VCOs, dynamic digital delay, and glitch-less analog delay provide a flexible high-performance clocking solution. The LMK04828 supports two ranges of VCOs, from 2370 MHz to 2630 MHz and 2920 MHz to 3080 MHz.