TIDUEY6 April   2021

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 C2000 MCU F2838x
      2. 2.3.2 UCC5870-Q1 Gate Driver
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Hardware Overview
        1. 3.1.1.1 Control Module
          1. 3.1.1.1.1 Control Mother Board
            1. 3.1.1.1.1.1 Inverter Safing - UCC5870 ASC and Fault Control
            2. 3.1.1.1.1.2 DC-DC Safing
            3. 3.1.1.1.1.3 DC-DC Converter Secondary PWM Selection
            4. 3.1.1.1.1.4 Blower Fan Control
            5. 3.1.1.1.1.5 Voltage Monitor
            6. 3.1.1.1.1.6 Resolver Interface Control
            7. 3.1.1.1.1.7 Test Points on Control Module
            8. 3.1.1.1.1.8 General Purpose Ports
            9. 3.1.1.1.1.9 Connectors and Headers on Control Mother Board
          2. 3.1.1.1.2 Power Supplies
            1. 3.1.1.1.2.1 Power Supply 5V /5A
            2. 3.1.1.1.2.2 Power Supply 12-V/1-A
            3. 3.1.1.1.2.3 Power Supply 15-V/0.5-A
          3. 3.1.1.1.3 TCAN4550 module
          4. 3.1.1.1.4 Dual TCAN Module
          5. 3.1.1.1.5 Analog Back End Module
          6. 3.1.1.1.6 Resolver Analog Front End Module
        2. 3.1.1.2 Inverter Module
          1. 3.1.1.2.1 Inverter Mother Board
            1. 3.1.1.2.1.1 Connectors and Headers on Inverter Mother Board
            2. 3.1.1.2.1.2 Jumper and Test Points on Inverter Module
          2. 3.1.1.2.2 Inverter Gate Driver Module
            1. 3.1.1.2.2.1 Inverter Gate Drive Power Supply Module
          3. 3.1.1.2.3 Inverter Current Sense Module
          4. 3.1.1.2.4 Inverter Voltage Sense Module
        3. 3.1.1.3 DC-DC Bidirectional Converter Module
          1. 3.1.1.3.1 DC-DC Converter Mother Board
          2. 3.1.1.3.2 DC-DC Gate Driver Module
    2. 3.2 Resource Mapping
    3. 3.3 Test Setup
    4. 3.4 Test Results
  9. 4General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  10. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  11. 6About the Author

3.2 Resource Mapping

This section describes the pin mapping of C2000 and Safety MCUs for target functions.

Table 3-7 Functional mapping of Digital Signals of C2000 MCU
SIGNAL NAME MCU GPIO MCU PERIPHERAL LINKED WITH GPIO FUNCTION
IN+A 0

EPWM 1A

 PWM for inverter phase A high side
IN-A 1

EPWM 1B

 PWM for inverter phase A low side
IN+B 2

EPWM 2A

 PWM for inverter phase B high side
IN-B 3

EPWM 2B

 PWM for inverter phase B low side
IN+C 4

EPWM 3A

 PWM for inverter phase C high side

IN-C

 5 EPWM 3B PWM for inverter phase C low side

PWMA

 6 EPWM 4A

PWM for DC-DC primary phase A high side

PWMB

7

 EPWM 4B PWM for DC-DC primary phase A low side

PWMC

8

 EPWM 5A PWM for DC-DC primary phase B high side

PWMD

9

 EPWM 5B PWM for DC-DC primary phase B low side

PWME

10

 EPWM 6A

PWM for DC-DC secondary side A

PWMF (option-1)

11

 EPWM 6B PWM for DC-DC secondary side B

PWMF (option-2)

12

 EPWM 7A PWM for DC-DC secondary side (backup)

DC_DC_ENABLE

13

GPIO

Enable DC-DC

Resolver Exc (Option)

14

EPWM 8A

PWM for resolver carrier excitation

C2K_SoC_SYNC

15

GPIO

Sync to SMCU for ADCSoC from C2000

SDI

24

SPIB-SIMO

SPI link to UCC5870 gate drivers

SDO

25

 SPIB-SOMI SPI link to UCC5870 gate drivers

CLK

26

SPIB-CLK

 SPI link to UCC5870 gate drivers

nCS

27

SPIB-STE

 SPI link to UCC5870 gate drivers

TP10

35

GPIO / Output XBAR

Test point for monitoring

TP9

36

 GPIO / Output XBAR Test point for monitoring

TP8

37

 GPIO / Output XBAR Test point for monitoring

TP7

38

 GPIO / Output XBAR Test point for monitoring

CTRL

41

GPIO

Resolver - analog mux control

VinvA

48

GPIO

Inverter output A digital status

VinvB

96

GPIO

 Inverter output B digital status

VinvC

98

GPIO

 Inverter output C digital status

FSITX_D0

49

FSI

Interface to ETAS / JTAG header
FSITX_D1

50

FSI

 Interface to ETAS / JTAG header
FSITX_CLK

51

FSI

 Interface to ETAS / JTAG header

INH

52

GPIO

Resolver - analog mux inhibit

OT/SHDN

53

GPIO

Resolver - Exc amp ALM2403 status

QEPA

54

QEP / SPI

Test port for QEP or SPI (optional)

QEPB

55

 QEP / SPI Test port for QEP or SPI (optional)

QEPS

56

 QEP / SPI Test port for QEP or SPI (optional)

QEPI

57

 QEP / SPI Test port for QEP or SPI (optional)

PMIC_DRVEN

58

GPIO

FuSa signal from SMCU

nSTB

60

CAN

CAN interface

TxD

61

CAN

 CAN interface

RxD

62

CAN

 CAN interface

C2K PS EN

64

GPIO

5V IPS enable (int power supply)

Clr_OXP_latch

66

GPIO

Clear OCP/OVP latched fault on ABE

OVP_latch

68

GPIO

OVP latched fault from ABE

SCI - C2K_TX - SM_RX

70

SCI

Serial comm with SMCU

SCI - C2K_RX - SM_TX

71

SCI

 Serial comm with SMCU

OVP

74

GPIO

OVP from hot side sensing

OTP_Latch

78

GPIO

 OTP latched fault from ABE

OCP_Latch

82

GPIO

 OCP latched fault from ABE

ASC_EN

86

 GPIO

ASC enable for UCC5870 drivers

ASC_L

88

 GPIO ASC low side control of UCC5870

ASC_H

90

 GPIO ASC high side control of UCC5870

nFLT2_L

92

 GPIO

Secondary fault status of low side UCC5870s

nFLT1_L

94

 GPIO Primary fault status of low side UCC5870s

nFLT2_H

127

 GPIO Secondary fault status of high side UCC5870s

nFLT1_H

147

 GPIO Primary fault status of high side UCC5870s
Table 3-8 Functional mapping of Analog Signals of C2000 MCU
SIGNAL NAME ANALOG CHANNEL FUNCTION
TP2 A0 General purpose DAC
TP1 A1 General purpose DAC
VdcFbk A2 HV DC feedback signal
VREF1/2 A3 Resolver sin/cos level shift
Ifb_A A4 Inverter phase current A
Temp2 A5 DC-DC transformer temparature
CT_OUT A14 DC-DC primary side CT current
Vfb_Vo2 B0 DC-DC secondary output voltage
EXC B1 Resolver carrier exc DAC
Vfb_Io / Vfb_Io2 B2 DC-DC secondary current
Vfb_Io B3 DC-DC secondary current
NTC B4 Resolver temperature from NTC
Temp1 B5 DC-DC heatsink temperature
Ifb_C C2 Inverter phase current C
Vdc2Fbk C3 HV DC redundant feedback signal
OEXC C4 Resolver excitation feedback
OCOS C5 Resolver cosine feedback
Ifb_B D0 Inverter phase current B
Vfb_Vo D2 DC DC secondary output voltage
ToPOT D3 General purpose external input from a pot
OSIN D5 Resolver sine feedback
Table 3-9 Functional Mapping of Digital Signals of TMS570LS1227
SIGNAM NAME GPIO PERIPHERAL LINKED WITH GPIO FUNCTION
nFLT2_H 0 Secondary fault status of high side UCC5870s
nFLT2_L 1 Secondary fault status of low side UCC5870s
nFLT1_H 2 Primary fault status of high side UCC5870s
nFLT1_L 3 Primary fault status of low side UCC5870s
OTP_Latch 4 OTP latched fault from ABE
OCP_Latch 5 OCP latched fault from ABE
OVP 6 OVP from protection logic
ASC_H 7 ASC high side control of UCC5870
ASC_L 8 ASC low side control of UCC5870
ASC_EN 9 ASC enable for UCC5870 drivers
PM_MUXA 10

Power monitor analog mux sel A
PM_MUXB 11 Power monitor analog mux sel B
MUX_INH 85 Power monitor analog mux inhibit
CAN_GPO2 12

TCAN4550 interface
CAN_GPO1 14 TCAN4550 interface
CAN_nINT 15 TCAN4550 interface
SPI_MOSI 16 SPI TCAN4550 interface
SPI_MISO 17 SPI TCAN4550 interface
SPI_CLK 18 SPI TCAN4550 interface
SPI_CS 19 SPI TCAN4550 interface
GPIO_RST 33

TCAN4550 interface
SM PS EN 23 5V IPS enable (int power supply)
C2K RST 24 Reset C2000 MCU
VinvA 25 ECAP Inverter output A digital status
VinvB 48 ECAP Inverter output B digital status
VinvC 49 ECAP Inverter output C digital status
SCI - C2K_TX - SM_RX 28 UART

SCI comm with C2K
SCI - C2K_RX - SM_TX 29 UART

SCI comm with C2K
RxD2 30 CAN

CAN interface
TxD2 31 CAN

CAN interface
nSTB2 34 CAN

CAN interface
C2K_SoC_SYNC 32

SoC Sync from C2K
DC_DC_ENABLE 59

Enable DC-DC
Clr_OXP_latch 60 Clear OCP/OVP latched fault on ABE
C2K_ERRSTS 86 Error status signal from C2K
EN_DRV 87 PMIC signal
Table 3-10 Functional ,Mapping of Analog Signals of Safety MCU
SIGNAL NAME ANALOG CHANNEL FUNCTION
VdcFbk ADINA0 HV DC feedback signal
Ifb_A ADINA1 Inverter phase current A
NTC ADINA2 Resolver temperature from NTC
OSIN ADINA3 Resolver sine feedback
1-COM ADINA4 Power monitor analog mux COM1
Ifb_B ADINB0 Inverter phase current B
Ifb_C ADINB1 Inverter phase current C
OEXC ADINB2 Resolver excitation feedback
OCOS ADINB3 Resolver cosine feedback
2-COM ADINB4 Power monitor analog mux COM2
Vdc2Fbk ADINB5 HV DC redundant feedback signal
Vfb_Vo2 ADINB6 DC-DC secondary output voltage
Vfb_Vo ADINB7 DC DC secondary output voltage