TIDUFD0 August   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Wireless Hardware Configurations
      2. 2.2.2 Auxiliary Power Strategy
      3. 2.2.3 Thermistor Multiplexer
      4. 2.2.4 Cell Balancing
    3. 2.3 Highlighted Products
      1. 2.3.1 CC2662R-Q1
      2. 2.3.2 BQ78706
      3. 2.3.3 TMUX1308
      4. 2.3.4 LM5168
      5. 2.3.5 TMP61
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software Requirements
    3. 3.3 Test Setup
    4. 3.4 Test Results
      1. 3.4.1 Network Performance
        1. 3.4.1.1 Network Initiation
        2. 3.4.1.2 Network Latency
        3. 3.4.1.3 PDR, PS
        4. 3.4.1.4 Low-Power Mode
      2. 3.4.2 Cell Voltage Accuracy
      3. 3.4.3 Temperature Sensing Using TMP61
      4. 3.4.4 Thermistor Multiplexer Timing
      5. 3.4.5 Current Consumption
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Layout Prints
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

2.2.4 Cell Balancing

Figure 2-7 shows the cell balancing circuit.

TIDA-010976 Cell Balancing CircuitFigure 2-7 Cell Balancing Circuit

The design uses an internal field-effect transistor (FET) to achieve a 100mA balancing current. Assuming the given condition: an initial CB voltage of 3.5V, the final CB voltage is 3.3V. To achieve 100mA balancing current while the CB voltage is 3.5V; Rcb6 = Rcb5 = 17Ω is used.