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Product details

Parameters

Number of input channels 16 Active supply current (Typ) (mA) 208 Supply voltage (Max) (V) 3.3 Operating temperature range (C) 0 to 85 Interface type LVDS Features Analog Front End (AFE) open-in-new Find other Ultrasound AFEs

Package | Pins | Size

NFBGA (ZAV) 289 225 mm² 15 x 15 open-in-new Find other Ultrasound AFEs

Features

  • 16-Channel AFE for ultrasound applications:
    • Four programmable TGC setting profiles
  • Low-noise amplifier (LNA) With Active Termination:
    • Programmable gain: 21 dB, 18 dB, and 15 dB
    • Linear input amplitude: 0.37/0.5/0.71 VPP
    • Maximum input amplitude: 1 Vpp
  • Voltage-controlled attenuator (VCAT):
    • Attenuation range: 0 dB–36 dB
  • Programmable gain amplifier (PGA):
    • 18 dB–27 dB in Steps of 3 dB
  • 3rd-Order, 10 ~ 60 MHz Low-pass filter (LPF)
  • ADC Idle-Channel SNR:
    • 16-Bit, 125-MSPS Mode: 80-dBFS
    • 14-Bit, 80-MSPS Mode: 79-dBFS
  • Excellent near field SNR: 74-dBFS
  • TGC Mode JESD204B output
    • 140 mW/Ch, 0.8 nV/√Hz, 125 MSPS, 16 bit
    • 120 mW/Ch, 0.8 nV/√Hz, 80 MSPS, 16 bit
    • 115 mW/Ch, 0.8 nV/√Hz, 65 MSPS, 16 bit
    • 105 mW/Ch, 0.8 nV/√Hz, 40 MSPS, 16 bit
  • TGC Mode LVDS output
    • 120 mW/Ch, 0.8 nV/√Hz, 80 MSPS, 16 bit
    • 115 mW/Ch, 0.8 nV/√Hz, 65 MSPS, 16 bit
    • 150 mW/Ch, 0.8 nV/√Hz, 125 MSPS, 16 bit, Decimation by 2, LVDS 0.5x mode
  • CW Mode: 63 mW/Ch, 1.15 nV/√Hz
  • ±0.4 dB (typical) Device-to-device gain matching
  • Fast and consistent overload recovery
  • Continuous wave (CW) path with:
    • –159 dBc/Hz Phase noise at 1-kHz off carrier
    • λ / 16 Phase resolution
    • Supports 16x and 8x CW clocks
    • 12-dB Suppression of 3rd and 5th harmonics
  • Digital I/Q demodulator w/ data reduction
    • Fractional decimation filter M = 1 to 63 with increments of 0.25
    • On-chip RAM with 32 preset profiles
  • LVDS Interface with a speed Up to 1.28 Gbps
  • 10-Gbps JESD204B Subclass 0, 1, and 2
    • Up to 12.8-Gbps with 10-cm PCB traces
    • 2, 4, or 8 Channels per JESD lane

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Description

The AFE58JD48 device is a highly-integrated, analog front-end (AFE) solutions specifically designed for premium ultrasound systems.

The AFE58JD48 is an integrated AFE optimized for premium medical ultrasound application. The device is realized through a multichip module (MCM) with three dies: one 16-CH voltage-controlled amplifier (VCA) die and two 8-CH analog-to-digital converter (ADC) dies.

Each channel in the VCA die can be configured in one of two modes: time gain compensation (TGC) mode or continuous wave (CW) mode. In TGC mode, each channel includes a low-noise amplifier (LNA), a voltage-controlled attenuator (VCAT), a programmable gain amplifier (PGA), and a third-order, low-pass filter (LPF). The LNA is programmable in gains of 21 dB, 18 dB, or 15 dB. The LNA also supports active termination. The VCAT supports an attenuation range of 0 dB to 36 dB, with analog voltage control for the attenuation. The PGA provides gain options from 18 dB to 27 dB in steps of 3 dB. The LPF cutoff frequency can be set between 10 MHz and 60 MHz to support ultrasound applications with different frequencies, especially the emerging high frequency ultrasound imaging applications. In CW mode, the output of the LNA goes to a low-power passive mixer with 16 selectable phase delays followed by a summing amplifier with a band-pass filter. Different phase delays can be applied to each analog input signal to perform an on-chip beamforming operation. A harmonic filter in the CW mixer suppresses the third and fifth harmonic to enhance the sensitivity of the CW Doppler measurement.

The ADC die can be configured to operate with a resolution of 16 bits or 14 bits. The ADC primarily supports a JESD204B interface that runs up to 12.8 Gbps and reduces the circuit-board routing challenges in high-channel count systems. The output interface of the ADC can also be set as a low-voltage differential signaling (LVDS) that can easily interface with low-cost field-programmable gate arrays (FPGAs). The ADC can operate at maximum speeds of 125 MSPS 16-bit and send out the digitized data with JESD204B interface. When the LVDS interface is used, the ADCs sampling rate and resolution are limited by the LVDS output rate of 1.28 Gbps, or 80 MSPS at 16-bit resolution. The ADC in 14-bit resolution can be configured in this scenario to sample at a higher speed but still maintain the same output data rate. The ADC is designed to scale its power with sampling rate.

The AFE58JD48 additionally includes a digital demodulator block. The digital in-phase and quadrature (I/Q) demodulator with programmable decimation filters accelerates computationally-intensive algorithms at low power.

The device also allows various power and noise combinations to be selected for optimizing system performance. Therefore, the device is a suitable ultrasound AFE solution for premium systems powered either by wall outlet or by batteries.

The device is available in a 15-mm × 15-mm NFBGA-289 package and is almost pin-compatible with the AFE58JD28 and AFE58JD18 devices.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet AFE58JD48 16-Channel Ultrasound AFE with 140-mW/Channel Power, 0.8-nV/√Hz Noise, 16-Bit, 125-MSPS ADC with JESD or LVDS Interface, Digital Demodulator, and Passive CW Mixer datasheet (Rev. A) Dec. 17, 2019
Technical articles Offset correction improves the next generation of heart-rate smart watches Aug. 24, 2015
Technical articles JESD204B: Is it for you? Mar. 14, 2014
Technical articles A new way to illuminate the human condition Dec. 30, 2013
Technical articles Oximeter signaling: There’s more than meets the eye Dec. 04, 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
599
Description

The AFE58JD48 evaluation module (EVM) is a platform for evaluating the AFE58JD48 device, which is a highly-integrated, analog front-end (AFE) solution specifically designed for ultrasound systems where high performance and small size are required. AFE58JD48 integrates a complete (...)

Features
  • 16-channel complete AFE
  • Programmable-gain low-noise amplifier (LNA)
  • Low-noise voltage-controlled attenuator
  • 14-bit or 16-bit analog-to-digital converter (ADC)
  • Requires TSW14J56EVM and high-speed data converter pro software (DATACONVERTERPRO-SW) for JESD204B data capture and performance evaluation

Design tools & simulation

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PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
NFBGA (ZAV) 289 View options

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