CD4077B

ACTIVE

CMOS Quad Exclusive-NOR Gate

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Product details

Parameters

Technology Family CD4000 VCC (Min) (V) 3 VCC (Max) (V) 18 Channels (#) 4 Inputs per channel 4 IOL (Max) (mA) 6.8 Input type Standard CMOS IOH (Max) (mA) -6.8 Output type Push-Pull Features Standard Speed (tpd > 50ns) Data rate (Max) (Mbps) 8 Rating Catalog Operating temperature range (C) -55 to 125 open-in-new Find other XNOR (exclusive NOR) gate

Package | Pins | Size

PDIP (N) 14 181 mm² 19.3 x 9.4 SOIC (D) 14 52 mm² 8.65 x 6 SOP (NS) 14 80 mm² 10.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other XNOR (exclusive NOR) gate

Features

  • High-Voltage Types (20V Rating)
  • CD4070B - Quad Exclusive-OR Gate
  • CD4077B - Quad Exclusive-NOR Gate
  • Medium Speed Operation
    • tPHL, tPLH = 65ns (Typ) at VDD = 10V, CL = 50pF
  • 100% Tested for Quiescent Current at 20V
  • Standardized Symmetrical Output Characteristics
  • 5V, 10V and 15V Parametric Ratings
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range
    • 100nA at 18V and 25°C
  • Noise Margin (Over Full Package Temperature Range)
    • 1V at VDD = 5V, 2V at VDD = 10V, 2.5V at VDD = 15V
  • Meets All Requirements of JEDEC Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices
  • Applications
    • Logical Comparators
    • Adders/Subtractors
    • Parity Generators and Checkers

Data sheet acquired from Harris Semiconductor

open-in-new Find other XNOR (exclusive NOR) gate

Description

The Harris CD4070B contains four independent Exclusive-OR gates. The Harris CD4077B contains four independent Exclusive-NOR gates.

The CD4070B and CD4077B provide the system designer with a means for direct implementation of the Exclusive-OR and Exclusive-NOR functions, respectively.

open-in-new Find other XNOR (exclusive NOR) gate
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Technical documentation

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Type Title Date
* Datasheet CD4070B, CD4077B datasheet (Rev. E) Aug. 21, 2003
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics Dec. 03, 2001

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODELS Download
SCHM011.ZIP (7 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
PDIP (N) 14 View options
SO (NS) 14 View options
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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