Product details

Technology family ACT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 40 Input type TTL-Compatible CMOS Output type 3-State Features Standard speed (tpd > 50ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family ACT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 40 Input type TTL-Compatible CMOS Output type 3-State Features Standard speed (tpd > 50ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67
  • Inputs are TTL-voltage compatible
  • Speed of Bipolar F, AS, and S, with significantly reduced power consumption
  • Balanced propagation delays
  • ± 24-ma output drive current
    • Fanout to 15 F Devices
  • SCR-latchup-resistant CMOS process and circuit design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Inputs are TTL-voltage compatible
  • Speed of Bipolar F, AS, and S, with significantly reduced power consumption
  • Balanced propagation delays
  • ± 24-ma output drive current
    • Fanout to 15 F Devices
  • SCR-latchup-resistant CMOS process and circuit design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

The ’ACT04 devices contain six independent inverters. The devices perform the Boolean function Y = A.

The ’ACT04 devices contain six independent inverters. The devices perform the Boolean function Y = A.

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Technical documentation

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Type Title Date
* Data sheet CDx4ACT04 Hex Inverters datasheet (Rev. C) PDF | HTML 15 May 2023
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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CDIP (J) 14 Ultra Librarian

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