CD54HC14

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Military 6-ch, 2-V to 6-V inverters

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Product details

Parameters

Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 6 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 20 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Catalog, Military open-in-new Find other Inverting buffer/driver

Package | Pins | Size

CDIP (J) 14 130 mm² 19.94 x 6.73 open-in-new Find other Inverting buffer/driver

Features

  • Unlimited Input Rise and Fall Times
  • Exceptionally High Noise Immunity
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

open-in-new Find other Inverting buffer/driver

Description

The ’HC14 and ’HCT14 each contain six inverting Schmitt Triggers in one package.

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Technical documentation

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Type Title Date
* Data sheet CD54HC14, CD74HC14, CD54HCT14, CD74HCT14 datasheet (Rev. F) Feb. 08, 2005
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Application note Understanding Schmitt Triggers Sep. 21, 2011
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

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CAD/CAE symbols

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CDIP (J) 14 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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