Product details

Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 6 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 20 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Military
Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 6 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 ICC (Max) (uA) 20 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Military
CDIP (J) 14 130 mm² 19.94 x 6.73
  • Buffered inputs
  • Wide operating voltage range: 2 V to 6 V
  • Wide operating temperature range: -55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
  • Buffered inputs
  • Wide operating voltage range: 2 V to 6 V
  • Wide operating temperature range: -55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs

This device contains six independent inverters with Schmitt-trigger inputs. Each gate performs the Boolean function Y =  A in positive logic.

This device contains six independent inverters with Schmitt-trigger inputs. Each gate performs the Boolean function Y =  A in positive logic.

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Technical documentation

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Type Title Date
* Data sheet CDx4HC14 Hex Inverters with Schmitt-Trigger Inputs datasheet (Rev. G) 12 May 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
Application note Understanding Schmitt Triggers 21 Sep 2011
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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CDIP (J) 14 View options

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