CD54HC4002

ACTIVE

Military 2-ch, 4-input, 2-V to 6-V NOR gates

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Product details

Parameters

Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Channels (#) 2 Inputs per channel 4 IOL (Max) (mA) 5.2 IOH (Max) (mA) -5.2 Input type Standard CMOS Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (Max) (Mbps) 28 Rating Military Operating temperature range (C) -55 to 125 open-in-new Find other NOR gate

Package | Pins | Size

CDIP (J) 14 130 mm² 19.94 x 6.73 open-in-new Find other NOR gate

Features

  • Typical Propagation Delay = 8ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range... –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

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Description

The ’HC4002 logic gate utilizes silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The ’HC4002 logic family is functional as well as pin compatible with the standard LS logic family.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet CD54HC4002, CD74HC4002 datasheet (Rev. E) Oct. 21, 2003
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

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CAD/CAE symbols

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CDIP (J) 14 View options

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