CD74AC10 Triple 3-Input NAND Gates | TI.com

CD74AC10
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Triple 3-Input NAND Gates

Triple 3-Input NAND Gates - CD74AC10
Datasheet
 

Description

The CD74AC10 contains three independent 3-input NAND gates. This device performs the Boolean function Y = (A •B • C)\ or Y = A\ + B\ + C\ in positive logic.

Features

  • AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Rating Data rate (Max) (Mbps) Operating temperature range (C) Package size: mm2:W x L (PKG) Package Group
CD74AC10 Order now AC     1.5     5.5     3     3     24     -24     Standard CMOS     Push-Pull     Over-Voltage Tolerant Inputs
Standard Speed (tpd > 50ns)    
Catalog     100     -55 to 125     14PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)    
PDIP | 14
SOIC | 14