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Noninverting buffers & drivers

CD74HC4050

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6-ch, 2-V to 6-V buffers

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Data sheet

CD74HC4050

ACTIVE
Data sheet Order now

Product details

Technology family HC Number of channels 6 IOL (max) (mA) 4 Supply current (max) (µA) 40 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) -55 to 125
Technology family HC Number of channels 6 IOL (max) (mA) 4 Supply current (max) (µA) 40 IOH (max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm)
  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C
  • High-to-Low Voltage Level Converter for up to VI = 16V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C
  • High-to-Low Voltage Level Converter for up to VI = 16V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be used as logic level translators which convert high-level logic to a low-level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types.

The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be used as logic level translators which convert high-level logic to a low-level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types.
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* Data sheet CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 datasheet (Rev. I) Feb 4, 2005

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