CD74HC4050 High Speed CMOS Logic Hex Non-Inverting Buffers | TI.com

CD74HC4050
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High Speed CMOS Logic Hex Non-Inverting Buffers

High Speed CMOS Logic Hex Non-Inverting Buffers - CD74HC4050
Datasheet
CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050 datasheet (Rev. I)
 

Description

The ’HC4049 and ’HC4050 are fabricated with high-speed silicon gate technology. They have a modified input protection structure that enables these parts to be used as logic level translators which convert high-level logic to a low-level logic while operating off the low-level logic supply. For example, 15-V input pulse levels can be down-converted to 0-V to 5-V logic levels. The modified input protection structure protects the input from negative electrostatic discharge. These parts also can be used as simple buffers or inverters without level translation. The ’HC4049 and ’HC4050 are enhanced versions of equivalent CMOS types.

Features

  • Typical Propagation Delay: 6ns at VCC = 5V, CL = 15pF, TA = 25°C
  • High-to-Low Voltage Level Converter for up to VI = 16V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) IOL (Max) (mA) IOH (Max) (mA) ICC (uA) Input type Output type Features Data rate (Mbps) Rating Operating temperature range (C) Package Group
CD74HC4050 Order now HC     2     6     6     4     -4     40     Standard CMOS     Push-Pull     Balanced outputs
High speed (tpd 10-50ns)
Input clamp diode    		 56     Catalog     -55 to 125     PDIP | 16
SOIC | 16
SO | 16
TSSOP | 16    
CD54HC4050 Samples not available HC     2     6     6     4     -4     20     Standard CMOS     Push-Pull     Standard speed (tpd > 50ns)     56     Military     -55 to 125     CDIP | 16