Product details

Function Single-ended Output frequency (max) (MHz) 100 Number of outputs 6 Output supply voltage (V) 5 Core supply voltage (V) 5 Output skew (ps) 0.5 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type TTL Input type TTL
Function Single-ended Output frequency (max) (MHz) 100 Number of outputs 6 Output supply voltage (V) 5 Core supply voltage (V) 5 Output skew (ps) 0.5 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type TTL Input type TTL
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Low Output Skew for Clock-Distribution and Clock-Generation Applications
  • TTL-Compatible Inputs and Outputs
  • Distributes One Clock Input to Six Clock Outputs
  • Polarity Control Selects True or Complementary Outputs
  • Distributed VCC and GND Pins Reduce Switching Noise
  • High-Drive Outputs (-48-mA IOH, 48-mA IOL)
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Packaged in Plastic Small-Outline Package

    EPIC-IIB is a trademark of Texas Instruments Incorporated.

     

  • Low Output Skew for Clock-Distribution and Clock-Generation Applications
  • TTL-Compatible Inputs and Outputs
  • Distributes One Clock Input to Six Clock Outputs
  • Polarity Control Selects True or Complementary Outputs
  • Distributed VCC and GND Pins Reduce Switching Noise
  • High-Drive Outputs (-48-mA IOH, 48-mA IOL)
  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Packaged in Plastic Small-Outline Package

    EPIC-IIB is a trademark of Texas Instruments Incorporated.

     

The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T\/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable () input is provided to disable the outputs to a high-impedance state.

The CDC391 is characterized for operation from -40°C to 85°C.

 

 

The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T\/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable () input is provided to disable the outputs to a high-impedance state.

The CDC391 is characterized for operation from -40°C to 85°C.

 

 

Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet 1-Line To 6-Line Clock Driver w/ Selectable Polarity And 3-State Output datasheet (Rev. A) 01 Nov 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

CDC391 IBIS Model

SCAM017.ZIP (5 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 16 Ultra Librarian

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos