DS90UH926Q-Q1

ACTIVE

Product details

Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (Max) (MHz) 85 Output compatibility LVCMOS Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Operating temperature range (C) -40 to 105
Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (Max) (MHz) 85 Output compatibility LVCMOS Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Operating temperature range (C) -40 to 105
WQFN (NKB) 60 81 mm² 9 x 9
  • AEC-Q100 Qualified for Automotive Applications
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature
    • Device HBM ESD Classification Level 3B
    • Device CDM ESD Classification Level C6
    • Device MM ESD Classification Level M3
  • Integrated HDCP Cipher Engine With On-Chip Key Storage
  • Bidirectional Control Interface Channel Interface With I2C Compatible Serial Control Bus
  • Supports High-Definition (720p) Digital Video Format
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5- to 85-MHz PCLK Supported
  • Single 3.3-V Operation With 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
  • AC-Coupled STP Interconnect up to 10 Meters
  • Parallel LVCMOS Video Outputs
  • DC-Balanced and Scrambled Data With Embedded Clock
  • Adaptive Cable Equalization
  • Supports HDCP Repeater Application
  • Image Enhancement (White Balance and Dithering) and Internal Pattern Generation
  • EMI Minimization (SSCG and EPTO)
  • Low Power Modes Minimize Power Dissipation
  • Backward-Compatible Modes
  • AEC-Q100 Qualified for Automotive Applications
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature
    • Device HBM ESD Classification Level 3B
    • Device CDM ESD Classification Level C6
    • Device MM ESD Classification Level M3
  • Integrated HDCP Cipher Engine With On-Chip Key Storage
  • Bidirectional Control Interface Channel Interface With I2C Compatible Serial Control Bus
  • Supports High-Definition (720p) Digital Video Format
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5- to 85-MHz PCLK Supported
  • Single 3.3-V Operation With 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
  • AC-Coupled STP Interconnect up to 10 Meters
  • Parallel LVCMOS Video Outputs
  • DC-Balanced and Scrambled Data With Embedded Clock
  • Adaptive Cable Equalization
  • Supports HDCP Repeater Application
  • Image Enhancement (White Balance and Dithering) and Internal Pattern Generation
  • EMI Minimization (SSCG and EPTO)
  • Low Power Modes Minimize Power Dissipation
  • Backward-Compatible Modes

The DS90UH926Q-Q1 deserializer, in conjunction with the DS90UH925Q-Q1 serializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB video interface into a single-pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports full duplex of high-speed forward data transmission and low-speed backchannel communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

The DS90UH926Q-Q1 deserializer has a 31-bit parallel LVCMOS output interface to accommodate the RGB, video control, and audio data. The device extracts the clock from a high-speed serial stream. An output LOCK pin provides the link status if the incoming data stream is locked, without the use of a training sequence or special SYNC patterns, as well as a reference clock.

An adaptive equalizer optimizes the maximum cable reach. EMI is minimized by output SSC generation (SSCG) and enhanced progressive turnon (EPTO) features.

The HDCP cipher engine is implemented in both the serializer and deserializer. HDCP keys are stored in on-chip memory.

The DS90UH926Q-Q1 deserializer, in conjunction with the DS90UH925Q-Q1 serializer, provides a solution for secure distribution of content-protected digital video within automotive entertainment systems. This chipset translates a parallel RGB video interface into a single-pair high-speed serialized interface. The digital video data is protected using the industry standard HDCP copy protection scheme. The serial bus scheme, FPD-Link III, supports full duplex of high-speed forward data transmission and low-speed backchannel communication over a single differential link. Consolidation of video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

The DS90UH926Q-Q1 deserializer has a 31-bit parallel LVCMOS output interface to accommodate the RGB, video control, and audio data. The device extracts the clock from a high-speed serial stream. An output LOCK pin provides the link status if the incoming data stream is locked, without the use of a training sequence or special SYNC patterns, as well as a reference clock.

An adaptive equalizer optimizes the maximum cable reach. EMI is minimized by output SSC generation (SSCG) and enhanced progressive turnon (EPTO) features.

The HDCP cipher engine is implemented in both the serializer and deserializer. HDCP keys are stored in on-chip memory.

Download

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 7
Type Title Date
* Data sheet DS90UH926Q-Q1 720p, 24-Bit Color FPD-Link III Deserializer With HDCP datasheet (Rev. M) 03 Aug 2017
Application note Exploring the Int Test Pattern Generation Feature of FPD-Link III IVI Devices (Rev. G) 03 Nov 2020
Technical article How to choose a power supply for an automotive camera module 17 Sep 2020
Application note Enabling GPIOs in DS90UB925 and DS90UB926 10 Nov 2015
Application note Using the I2S Audio Interface of DS90Ux92x FPD-Link III Devices 04 May 2013
Application note I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) 26 Apr 2013
User guide DS90UH926QSEVB User's Guide 20 Sep 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DS90UB928QEVM — DS90UB928QEVM FPD-Link III Deserializer Evaluation Module

The Texas Instruments DS90UB928QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UB928Q 5MHz-85MHz FPD-Link III Deserializer (DES). The device translates a high-speed serialized FPD-Link III interface transported over a single shielded twisted (...)
Out of stock on TI.com
Evaluation board

DS90UH926QSEVB — DS90UH926QSEVB Evaluation Module

The DS90UH926QSEVB is an evaluation board designed to demonstrate the performance and unique features of the DS90UH926Q FPD-Link III deserializer.

The DS90UH926QSEVB board is designed to accept any of TI’s compatible FPD-Link III serializer devices. The FPD-Link III serial input interface is (...)

Evaluation board

DS90UH928QEVM — DS90UH928QEVM FPD-Link III Deserializer Evaluation Module

The Texas Instruments DS90UH928QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UH928Q 5MHz-85MHz FPD-Link III Deserializer (DES). The device translates a high-speed serialized FPD-Link III interface transported over a single shielded twisted (...)

Simulation model

DS90UH926Q IBIS Model

SNLM119.ZIP (539 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Reference designs

TIDA-00169 — Automotive TFT LCD Display Solution

This reference design implements a video over LVDS solution for automotive infotainment applications.It highlights the support of multi-touch with haptic feedback, LCD backlight control, and ambient light sensing, without the introduction of dedicated support lines back to the host processor. This (...)
Package Pins Download
WQFN (NKB) 60 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos