ISO7840

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Highest isolation rating, quad-channel, 4/0, reinforced digital isolator

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Product details

Parameters

Integrated isolated power No Number of channels (#) 4 Forward/reverse channels 4/0 Isolation rating (Vrms) 5700 Data rate (Max) (Mbps) 100 Rating Catalog Surge voltage capability (Vpk) 12800 Current consumption per channel (DC) (Typ) (mA) 0.88 Current consumption per channel (1 Mbps) (Typ) (mA) 1.53 Operating temperature range (C) -55 to 125 Default output High, Low Supply voltage (Max) (V) 5.5 Supply voltage (Min) (V) 2.25 Propagation delay (Typ) (ns) 10.7 open-in-new Find other Digital isolators

Package | Pins | Size

SOIC (DW) 16 77 mm² 10.3 x 7.5 SOIC (DWW) 16 178 mm² 10.3 x 17.25 open-in-new Find other Digital isolators

Features

  • Signaling Rate: Up to 100 Mbps
  • Wide Supply Range: 2.25 V to 5.5 V
  • 2.25-V to 5.5-V Level Translation
  • Wide Temperature Range: –55°C to +125°C
  • Low-Power Consumption, Typical 1.7 mA per Channel at 1 Mbps
  • Low Propagation Delay: 11 ns Typical
    (5-V Supplies)
  • Industry leading CMTI (Min): ±100 kV/µs
  • Robust Electromagnetic Compatibility (EMC)
  • System-Level ESD, EFT, and Surge Immunity
  • Low Emissions
  • Isolation Barrier Life: >40 Years
  • Wide Body SOIC-16 Package and Extra-Wide Body SOIC-16 Package Options
  • Safety and Regulatory Approvals:
    • 8000-VPK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5.7-kVRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 60601-1 End Equipment Standards
    • CQC Certification per GB4943.1-2011
    • TUV Certification per EN 61010-1 and EN 60950-1
    • All DW Package Certifications Complete; DWW Package Certifications Complete per UL, VDE, TUV and Planned for CSA and CQC

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Description

The ISO7840x device is a high-performance, quad-channel digital isolator with a 8000-VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low-power consumption, while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by a silicon-dioxide (SiO2) insulation barrier.

This device comes with enable pins that can be used to put the respective outputs in high impedance for multi-master driving applications and to reduce power consumption. The ISO7840 device has four forward and zero reverse-direction channels. If the input power or signal is lost, the default output is high for the ISO7840 device and low for the ISO7840F device. See the Device Functional Modes section for further details.

Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through innovative chip design and layout techniques, electromagnetic compatibility of the ISO7840 device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance.

The ISO7840 device is available in 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages.

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Technical documentation

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Type Title Date
* Datasheet ISO7840x High-Performance, 8000-VPK Reinforced Quad-Channel Digital Isolator datasheet (Rev. B) Apr. 15, 2016
More literature TUV certificate for isolation devices (Rev. I) Mar. 14, 2020
Technical articles What the DIN VDE V 0884-11:2017-01 standard means for your isolated designs Feb. 27, 2020
Technical articles Isolation 101: How to find the right isolation solution for your application Feb. 11, 2020
Technical articles Why signal isolation matters in 48-V HEV/EV systems Nov. 20, 2019
More literature CSA Certification (Rev. P) Nov. 19, 2019
More literature VDE certificate for reinforced isolation for DIN VDE V 0884-11:2017-01 (Rev. N) Nov. 13, 2019
Technical articles Optocouplers and silicon-based galvanic isolation technology – how do they work? Oct. 28, 2019
White papers Isolation in AC Motor Drives: Understanding the IEC 61800-5-1 Safety Standard (Rev. A) Sep. 19, 2019
More literature CQC Certification (Rev. F) Sep. 13, 2019
More literature UL Certification (Rev. N) Jul. 30, 2019
Application notes Pushing the envelope with high-performance digital-isolation technology (Rev. A) Aug. 22, 2018
Application notes Digital Isolator Design Guide (Rev. B) Aug. 01, 2018
Application notes Considerations for Selecting Digital Isolators Jul. 24, 2018
White papers Isolation in solar power converters: Understanding the IEC62109-1 safety standar (Rev. A) May 18, 2018
Application notes How to reduce radiated emissions of digital isolators for systems with RF module Mar. 26, 2018
Application notes Isolation Glossary (Rev. A) Sep. 19, 2017
Application notes 4Q 2015 Analog Applications Journal Oct. 30, 2015
Application notes Pushing the envelope with high-performance digital-isolation technology Oct. 30, 2015
User guides ISO784xx Quad-Channel Digital Isolator EVM User Guide Oct. 17, 2014

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$49.00
Description

The ISO7842 provides galvanic isolation up to 5700 VRMS for 1 minute per UL and 8000 VPK per VDE. This device has four isolated channels comprised of a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. Used in conjunction with isolated power supplies, this (...)

Features
  • 8000 VPK isolation per VDE0884-10 Ed 2.0
  • 5.7 kVRMS isolation for 1 minute per UL 1577
  • Signaling rate: 100 Mbps
  • Isolation barrier life: > 25 years

Design tools & simulation

SIMULATION MODELS Download
SLLM281A.ZIP (52 KB) - IBIS Model
SIMULATION MODELS Download
SLLM282A.ZIP (52 KB) - IBIS Model

Reference designs

REFERENCE DESIGNS Download
20-bit, 1-MSPS Isolator Optimized Data Acquisition Reference Design Maximizing SNR and Sample Rate
TIDA-01037 — TIDA-01037 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design that utilizes two different isolator devices to maximize signal chain SNR and sample rate performance. For signals requiring low jitter, such as ADC sampling clocks, TI’s ISO73xx family of low jitter devices (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
20-bit Isolated Data Acquisition Reference Design Optimizing Jitter for Max SNR and Sample Rate
TIDA-01035 — The TIDA-01035 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design demonstrating how to resolve and optimize performance challenges typical of digitally isolated data acquisition systems.
  • Significantly improves high frequency AC signal chain performance (SNR  and THD) by (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
18-bit, 2-Msps Isolated Data Acquisition Reference Design to Achieve Maximum SNR and Sampling Rate
TIDA-00732 This “18-bit, 2-Msps Isolated Data Acquisition Reference Design to achieve maximum SNR and sampling rate”  illustrates how to overcome performance-limiting challenges typical of isolated data acquisition system design:
  • Maximizing sampling rate by minimizing propagation delay introduced by digital (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (DW) 16 View options
SOIC (DWW) 16 View options

Ordering & quality

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