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20-bit Isolated Data Acquisition Reference Design Optimizing Jitter for Max SNR and Sample Rate TIDA-01035 (ACTIVE)
See the Important Notice and Disclaimer covering reference designs and other TI resources.
Key Document
- 20-bit, 1 MSPS Isolated Data Acquisition (DAQ) Optimizing Jitter Design Guide (Rev. A)
(PDF 2414 KB)
17 Jan 2017
- TIDA-01035 Schematic and Block Diagram
(PDF 1275 KB)
16 Dec 2016
Description
The TIDA-01035 is a 20-bit, 1 MSPS isolated analog input data acquisition reference design demonstrating how to resolve and optimize performance challenges typical of digitally isolated data acquisition systems.
- Significantly improves high frequency AC signal chain performance (SNR and THD) by effectively mitigating ADC sample clock jitter across isolation boundary
- Maximizes sample rate by eliminating/minimizing propagation delay introduced by a digital isolator
- Provides option to evaluate performance with and without jitter mitigation technique with jumper
- Includes detailed timing analysis detailing the isolator’s additive jitter impact on data throughput
Features
- Isolated 20-bit, 1-MSPS, single channel differential Input Data Acquisition (DAQ) system
- Jitter mitigation technique realizes more than 18-dB system-level SNR improvement for high frequency input signals (100 kHz Fin, 1 MSPS)
- Reduced logic (on isolated ADC side) eliminates need for higher power and complex PLL solutions
- Achieves 1-MSPS sampling rate while preserving low SPI CLK rates with the ADS8900B ADC’s innovative multiSPI™ and ADC-master or Source-Synchronous mode digital interfaces
- Includes theory, calculations, component selection, PCB design and measurement results
See the Important Notice and Disclaimer covering reference designs and other TI resources.
