Product details

Technology Family AHC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 1 Inputs per channel 2 IOL (Max) (mA) 8 IOH (Max) (mA) 0 Input type Standard CMOS Output type Open-Drain Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (Max) (Mbps) 110 Rating Catalog Operating temperature range (C) -55 to 125
Technology Family AHC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 1 Inputs per channel 2 IOL (Max) (mA) 8 IOH (Max) (mA) 0 Input type Standard CMOS Output type Open-Drain Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (Max) (Mbps) 110 Rating Catalog Operating temperature range (C) -55 to 125
SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-SC70 (DCK) 5 4 mm² 2 x 2.1
  • Operating Range from 2 V to 5.5 V
  • Maximum tpd of 6 ns at 5 V
  • ±8-mA Output Drive at 5 V
  • Schmitt-Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22:
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • Operating Range from 2 V to 5.5 V
  • Maximum tpd of 6 ns at 5 V
  • ±8-mA Output Drive at 5 V
  • Schmitt-Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22:
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

The SN74AHC1G09 is a single 2-input positive-AND gate with an open drain output configuration. The device performs the Boolean logic Y = A × B or Y = A + B in positive logic.

The SN74AHC1G09 is a single 2-input positive-AND gate with an open drain output configuration. The device performs the Boolean logic Y = A × B or Y = A + B in positive logic.

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Technical documentation

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Type Title Date
* Data sheet SN74AHC1G09 Single 2–Input Positive-AND Gate With Open-Drain Output datasheet (Rev. D) PDF | HTML 30 Sep 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 Sep 1999
More literature Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic EVM supporting 5 through 8 pin DCK, DCT, DCU, DRL, and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model

SN74AHC1G09 Behavioral SPICE Model

SCLM272.ZIP (6 KB) - PSpice Model
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Test report: PDF
Schematic: PDF
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The 3D Machine Vision reference design employs Texas Instruments DLP® Advanced Light Control Software Development Kit (SDK) for LightCrafter™ series controllers, which allows developers to easily construct 3D point clouds by integrating TI’s digital micromirror device (DMD) (...)
Test report: PDF
Schematic: PDF
Package Pins Download
SC70 (DCK) 5 View options
SOT-23 (DBV) 5 View options

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