4-bit dual-supply bus transceiver with configurable voltage-level shifting and 3-state outputs
Exact equivalent in functionality and parametrics to the compared device:
Product details
Parameters
Package | Pins | Size
Features
- Each Channel Has an Independent DIR Control Input
- Control Inputs VIH/VIL Levels are Referenced to VCCA Voltage
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.1-V to 3.6-V Power-Supply Range
- I/Os are 4.6-V Tolerant
- Ioff Supports Partial Power-Down-Mode Operation
- Typical Data Rates
- 380 Mbps (1.8-V to 3.3-V Translation)
- 200 Mbps (<1.8-V to 3.3-V Translation)
- 200 Mbps (Translate to 2.5 V or 1.8 V)
- 150 Mbps (Translate to 1.5 V)
- 100 Mbps (Translate to 1.2 V)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds the Following Levels (Tested Per JESD 22)
- ±8000-V Human-Body Model (A114-A)
- 250-V Machine Model (A115-A)
- ±1500-V Charged-Device Model (C101)
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Description
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.1 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.1 to 3.6 V. The SN74AVC4T774 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage bi-directional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC4T774 is designed for asynchronous communication between data buses. The logic levels of the direction-control (DIR) input and the output-enable ( OE) input activate either the B-port outputs or the A-port outputs or place both output ports in the high-impedance mode. The device transmits data from the A bus to the B bus when the B outputs are activated, and from the B bus to the A bus when the A outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic and translation devices with included dual supply support
- Board has 9 sections that can be broken apart for a smaller form factor
Design tools & simulation
Reference designs
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
TSSOP (PW) | 16 | View options |
UQFN (RSV) | 16 | View options |
VQFN (RGY) | 16 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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