SN74CB3T3245

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Product details

Configuration 1:1 SPST Number of channels (#) 8 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (Typ) (Ohms) 5 CON (Typ) (pF) 5 ON-state leakage current (Max) (µA) 20 Bandwidth (MHz) 100 Operating temperature range (C) -40 to 85 Features Powered-off protection, Signal path translation Input/output continuous current (Max) (mA) 128 Rating Catalog
Configuration 1:1 SPST Number of channels (#) 8 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (Typ) (Ohms) 5 CON (Typ) (pF) 5 ON-state leakage current (Max) (µA) 20 Bandwidth (MHz) 100 Operating temperature range (C) -40 to 85 Features Powered-off protection, Signal path translation Input/output continuous current (Max) (mA) 128 Rating Catalog
SOIC (DW) 20 132 mm² 12.8 x 10.3 SSOP (DBQ) 20 52 mm² 8.65 x 6 TSSOP (PW) 20 29 mm² 4.4 x 6.5 TVSOP (DGV) 20 32 mm² 5 x 6.4
  • Standard ’245-Type Pinout
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation on All Data I/O Ports
    • 5-V Input Down to 3.3-V Output Level Shift With 3.3-V VCC
    • 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V VCC
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 5 Ω Typical)
  • Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 40 µA Maximum)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL or
    5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Ideal for Low-Power Portable Equipment
  • Standard ’245-Type Pinout
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation on All Data I/O Ports
    • 5-V Input Down to 3.3-V Output Level Shift With 3.3-V VCC
    • 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V VCC
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 5 Ω Typical)
  • Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 40 µA Maximum)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL or
    5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Ideal for Low-Power Portable Equipment

The SN74CB3T3245 device is a high-speed TTL-compatible 8-bit FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC.

The SN74CB3T3245 device is a high-speed TTL-compatible 8-bit FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC.

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Technical documentation

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Type Title Date
* Data sheet SN74CB3T3245 8-Bit FET Bus Switch 2.5-V and 3.3-V Low-Voltage With 5-V-Tolerant Level Shifter datasheet (Rev. C) 31 May 2018
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. D) 09 Dec 2021
Application note Multiplexers and Signal Switches Glossary (Rev. B) 01 Dec 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) 19 Nov 2021
Application note Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) 06 Jan 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 Feb 2003

Design & development

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Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

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Simulation model

HSPICE Model for SN74CB3T3245

SCDJ028.ZIP (99 KB) - HSpice Model
Simulation model

SN74CB3T3245 IBIS Model

SCDM055.ZIP (26 KB) - IBIS Model
Package Pins Download
SOIC (DW) 20 View options
SSOP (DBQ) 20 View options
TSSOP (PW) 20 View options
TVSOP (DGV) 20 View options

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