SN74CBT3345C

ACTIVE

5-V, 1:1 (SPST), 8-channel bus switch with –2-V undershoot protection

Top
5-V, 1:1 (SPST), 8-channel bus switch with –2-V undershoot protection

SN74CBT3345C

ACTIVE

Product details

Parameters

Configuration 1:1 SPST Number of channels (#) 8 Power supply voltage - single (V) 5 Ron (Typ) (Ohms) 3 Bandwidth (MHz) 200 Operating temperature range (C) -40 to 85 Features Powered-off protection, Undershoot protection Input/output continuous current (Max) (mA) 128 Rating Catalog CON (Typ) (pF) 14 open-in-new Find other Analog switches & muxes

Package | Pins | Size

SOIC (DW) 20 132 mm² 12.8 x 10.3 SSOP (DBQ) 20 52 mm² 8.65 x 6 TSSOP (PW) 20 42 mm² 6.5 x 6.4 open-in-new Find other Analog switches & muxes

Features

  • Undershoot Protection for Off-Isolation on A and B Ports Up to –2 V
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion Cio(OFF) = 5.5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption ICC = 3 µA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

open-in-new Find other Analog switches & muxes

Description

The SN74CBT3345C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3345C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT3345C is organized as an 8-bit bus switch with two output-enable (OE, OE\) inputs. When OE is high or OE\ is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low and OE\ is high, the bus switch is OFF and the high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

open-in-new Find other Analog switches & muxes
Download

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 14
Type Title Date
* Data sheet SN74CBT3345C datasheet (Rev. A) Oct. 15, 2003
Application note Multiplexers and Signal Switches Glossary (Rev. A) Jun. 09, 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. B) Jun. 08, 2021
Application note Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) Jan. 06, 2021
Application note Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Digital Bus Switch Selection Guide (Rev. A) Nov. 10, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Bus FET Switch Solutions for Live Insertion Applications Feb. 07, 2003

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

INTERFACE ADAPTER Download
document-generic User guide
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


Design tools & simulation

SIMULATION MODEL Download
SCDM052.ZIP (27 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
SOIC (DW) 20 View options
SSOP (DBQ) 20 View options
TSSOP (PW) 20 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos