SN74CBT6845C

ACTIVE

5-V, 1:1 (SPST), 8-channel FET bus switch with precharged outputs & –2-V undershoot protection

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5-V, 1:1 (SPST), 8-channel FET bus switch with precharged outputs & –2-V undershoot protection

SN74CBT6845C

ACTIVE

Product details

Parameters

Configuration 1:1 SPST Number of channels (#) 8 Power supply voltage - single (V) 5 Ron (Typ) (Ohms) 3 Bandwidth (MHz) 200 Operating temperature range (C) -40 to 85 Features Powered-off protection, Precharged signal path, Undershoot protection Input/output continuous current (Max) (mA) 128 Rating Catalog CON (Typ) (pF) 13.5 open-in-new Find other Analog switches & muxes

Package | Pins | Size

TSSOP (PW) 20 42 mm² 6.5 x 6.4 VQFN (RGY) 20 16 mm² 3.5 x 4.5 open-in-new Find other Analog switches & muxes

Features

  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • B-Port Outputs Are Precharged by Bias Voltage (BIASV) to Minimize Signal Distortion During Live Insertion and Hot-Plugging
  • Supports PCI Hot Plug
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 3 µA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

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Description

The SN74CBT6845C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT6845C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.

The SN74CBT6845C is an 8-bit bus switch with a single output-enable (OE\) input. When OE\ is low, the 8-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the 8-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. The B port is precharged to BIASV through the equivalent of a 10-k resistor when OE\ is high, or if the device is powered down (VCC = 0 V).

During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 15
Type Title Date
* Datasheet SN74CBT6845C datasheet Oct. 06, 2003
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. A) Jun. 30, 2020
Application note Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Application note Multiplexers and Signal Switches Glossary Mar. 06, 2020
Application note Eliminate power Sequencing with powered-off protection signal switches (Rev. B) Jan. 15, 2019
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Digital Bus Switch Selection Guide (Rev. A) Nov. 10, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Bus FET Switch Solutions for Live Insertion Applications Feb. 07, 2003
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families Feb. 04, 2003

Design & development

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Hardware development

INTERFACE ADAPTER Download
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Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
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  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
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Design tools & simulation

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TSSOP (PW) 20 View options
VQFN (RGY) 20 View options

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