Switch Connection Between Two PortsThe SN74CBTLV3384 provides ten bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as dual 5-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 5-bit bus switches or one 10-bit bus switch. When OE\ is low, the associated 5-bit bus switch is on and A port is connected to B port. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
| Package | Pins | Download |
|---|---|---|
| SOIC (DW) | 24 | View options |
| SSOP (DBQ) | 24 | View options |
| TSSOP (PW) | 24 | View options |
| TVSOP (DGV) | 24 | View options |
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