3.3-V, 1:1 (SPST), 10-channel FET bus switch with internal pulldown resistors
Product details
Parameters
Package | Pins | Size
Features
- Enable Signal Is SSTL_2 Compatible
- Flow-Through Architecture Optimizes PCB Layout
- Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications
- Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM
- Internal 10-k
Pulldown Resistors to Ground on B Port
- Internal 50-k
Pullup Resistor on Output-Enable Input
- Rail-to-Rail Switching on Data I/O Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
Description
This 10-bit FET bus switch is designed for 3-V to 3.6-V VCC operation and SSTL_2 output-enable (OE\) input levels.
When OE\ is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and
the high-impedance state exists between the two ports. There are 10-k pulldown resistors
to ground on the B port.
The FET switch on-state resistance is designed to replace the series terminating resistor in the SSTL_2 data path.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
Features
- Quick testing of TI's leaded surface mount packages
- Allows leaded suface mount packages to be plugged into 100mil spaced bread board
- Supports TI's 8 most popular leaded packages with a single panel
Design tools & simulation
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (DW) | 24 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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