Product details

Technology family HC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 85 Rating Catalog
Technology family HC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -40 to 85 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current Inverting Outputs Drive up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • ’HC257 ...Typical tpd = 9 ns
  • ’HC258 ...Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Provides Bus Interface from Multiple Sources in High-Performance Systems

  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current Inverting Outputs Drive up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • ’HC257 ...Typical tpd = 9 ns
  • ’HC258 ...Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Provides Bus Interface from Multiple Sources in High-Performance Systems

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G\) input is at a high logic level.

To ensure the high-impedance state during power up or power down, (G\) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G\) input is at a high logic level.

To ensure the high-impedance state during power up or power down, (G\) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet SN54HC257, SN54HC258, SN74HC257, SN74HC258 datasheet (Rev. B) 15 Sep 2003
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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PDIP (N) 16 View options
SOIC (D) 16 View options
SOP (NS) 16 View options
TSSOP (PW) 16 View options

Ordering & quality

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