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SN74LV05A

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6-ch, 2-V to 5.5-V inverters with open-drain outputs

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Data sheet

SN74LV05A

ACTIVE
Data sheet Order now

Product details

Technology family LV-A Number of channels 6 IOL (max) (mA) 12 IOH (max) (mA) 0 Supply current (max) (µA) 20 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV-A Number of channels 6 IOL (max) (mA) 12 IOH (max) (mA) 0 Supply current (max) (µA) 20 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) TVSOP (DGV) 14 23.04 mm² (3.6 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm)
  • VCC operation of 2 V to 5.5 V
  • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (output VOH undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support mixed-mode voltage operation on all ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17
  • VCC operation of 2 V to 5.5 V
  • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (output VOH undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support mixed-mode voltage operation on all ports
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

The SN74LV05A device contains six independent inverters designed for 2 V to 5.5 V VCC operation.

This device performs the Boolean function Y = A.

The SN74LV05A device contains six independent inverters designed for 2 V to 5.5 V VCC operation.

This device performs the Boolean function Y = A.
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Technical documentation

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* Data sheet SN74LV05A Hex Inverters With Open-Drain Outputs datasheet (Rev. K) PDF | HTML Mar 15, 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
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Simulation model

SN74LV05A Behavioral SPICE Model

SCLM191.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74LV05A IBIS Model

SCEM121.ZIP (9 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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