SN74LV125A Quadruple bus buffer gates with 3-state outputs | TI.com

SN74LV125A (ACTIVE)

Quadruple bus buffer gates with 3-state outputs

 

Description

The SN74LV125A quadruple bus buffer gate is designed for 2-V to 5.5-V VCC operation.

Features

  • 2-V to 5.5-V VCC Operation
  • Max tpd of 6 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 5°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support Mixed-Mode Voltage Operation on
    All Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per
    JESD 17
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model
    • 200-V Machine Model
    • 2000-V Charged-Device Model

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Parametrics Compare all products in Non-Inverting buffer/driver

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Bits (#)
Voltage (Nom) (V)
F @ nom voltage (Max) (Mhz)
ICC @ nom voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
IOL (Max) (mA)
IOH (Max) (mA)
Schmitt Trigger
Rating
Operating temperature range (C)
SN74LV125A SN74LV125A-Q1
LV-A     LV-A    
2     2    
5.5     5.5    
4     4    
2.5
3.3
5    
2.5
3.3
5    
110     110    
0.02     0.02    
15.5
9.5
6.5    
16.5
11.5
7.5    
16     16    
-16     -16    
No     No    
Catalog     Automotive    
-40 to 125
-40 to 85    
-40 to 125