The SN74LV1T02-Q1 is a
2-input NOR Gate. Each gate performs the Boolean function Y = A +
B in positive logic. The output level is referenced to the supply
voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
The input is designed with a lower threshold
circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V
input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant
input pins enable down translation (for example, 3.3V to 2.5V output).
The SN74LV1T02-Q1 is a
2-input NOR Gate. Each gate performs the Boolean function Y = A +
B in positive logic. The output level is referenced to the supply
voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
The input is designed with a lower threshold
circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V
input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant
input pins enable down translation (for example, 3.3V to 2.5V output).