SN74LVC00A-Q1 Automotive Catalog Quadruple 2-Input Positive-NAND Gate | TI.com

SN74LVC00A-Q1 (ACTIVE) Automotive Catalog Quadruple 2-Input Positive-NAND Gate

Automotive Catalog Quadruple 2-Input Positive-NAND Gate - SN74LVC00A-Q1
Datasheet
 

Description

The SN74LVC00A-Q1 quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation.

The device performs the Boolean function Y = A • B or Y = A + B in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

Features

  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Operates From 2 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.3 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2 V at VCC = 3.3 V, TA = 25°C

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Rating Data rate (Max) (Mbps) Operating temperature range (C) Package size: mm2:W x L (PKG) Package Group
SN74LVC00A-Q1 Order now LVC     2     3.6     4     2     24     -24     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Automotive     100     -40 to 125     14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)     TSSOP | 14    
SN54LVC00A Samples not available LVC     2     3.6     4     2     24     -24     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Military     100     -55 to 125     See datasheet (CDIP)
See datasheet (CFP)
20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20)    
CDIP | 14
CFP | 14
LCCC | 20    
SN74LVC00A Order now LVC     1.65     3.6     4     2     24     -24     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Catalog     100     -40 to 125     14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14SSOP: 48 mm2: 7.8 x 6.2 (SSOP | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)
14VQFN: 12 mm2: 3.5 x 3.5 (VQFN | 14)    
SOIC | 14
SO | 14
SSOP | 14
TSSOP | 14
VQFN | 14    
SN74LVC00A-EP Samples not available LVC     2     3.6     4     2     24     -24     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
HiRel Enhanced Product     100     -40 to 125
-55 to 125    
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)    
SOIC | 14
TSSOP | 14