Product details

Configuration 1:1 SPST Number of channels (#) 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Ron (Typ) (Ohms) 7.5 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 300 Operating temperature range (C) -40 to 85 Input/output continuous current (Max) (mA) 50 Rating Catalog CON (Typ) (pF) 13 Supply current (Typ) (uA) 1
Configuration 1:1 SPST Number of channels (#) 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Ron (Typ) (Ohms) 7.5 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 300 Operating temperature range (C) -40 to 85 Input/output continuous current (Max) (mA) 50 Rating Catalog CON (Typ) (pF) 13 Supply current (Typ) (uA) 1
DSBGA (YZP) 5 2 mm² .928 x 1.428 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 5 2 mm² 1.65 x 1.2 SOT-SC70 (DCK) 5 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 X2SON (DSF) 6 1 mm² 1 x 1
  • Available in the Texas Instruments NanoFree™ Package
  • 1.65-V to 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 0.8 ns at 3.3 V
  • High On-Off Output Voltage Ratio
  • High Degree of Linearity
  • High Speed, Typically 0.5 ns (VCC = 3 V,
    CL = 50 pF)
  • Low ON-State Resistance, Typically ≉5.5 Ω (VCC = 4.5 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoFree™ Package
  • 1.65-V to 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 0.8 ns at 3.3 V
  • High On-Off Output Voltage Ratio
  • High Degree of Linearity
  • High Speed, Typically 0.5 ns (VCC = 3 V,
    CL = 50 pF)
  • Low ON-State Resistance, Typically ≉5.5 Ω (VCC = 4.5 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This single analog switch is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G66 device can handle analog and digital signals. The device permits bidirectional transmission of signals with amplitudes of up to 5.5 V (peak).

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This single analog switch is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G66 device can handle analog and digital signals. The device permits bidirectional transmission of signals with amplitudes of up to 5.5 V (peak).

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

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Technical documentation

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Type Title Date
* Data sheet SN74LVC1G66 Single Bilateral Analog Switch datasheet (Rev. Q) 23 Mar 2017
Application note Selecting the Right Texas Instruments Signal Switch (Rev. C) 06 Aug 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Application note Multiplexers and Signal Switches Glossary (Rev. A) 09 Jun 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 May 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note LVC Characterization Information 01 Dec 1996
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 Sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

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Simulation model

HSPICE MODEL OF SN74LVC1G66

SCEJ198.ZIP (87 KB) - HSpice Model
Simulation model

SN74LVC1G66 IBIS Model (Rev. B)

SCEM332B.ZIP (34 KB) - IBIS Model
Package Pins Download
DSBGA (YZP) 5 View options
SC70 (DCK) 5 View options
SON (DRY) 6 View options
SON (DSF) 6 View options
SOT-23 (DBV) 5 View options
SOT-5X3 (DRL) 5 View options

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