Automotive Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation

SN74LVC1T45-Q1

ACTIVE

Product details

Technology Family LVC Applications GPIO Bits (#) 1 High input voltage (Min) (Vih) 1.08 High input voltage (Max) (Vih) 5.5 Vout (Min) (V) 1.65 Vout (Max) (V) 5.5 IOH (Max) (mA) -32 IOL (Max) (mA) 32 Rating Automotive
Technology Family LVC Applications GPIO Bits (#) 1 High input voltage (Min) (Vih) 1.08 High input voltage (Max) (Vih) 5.5 Vout (Min) (V) 1.65 Vout (Max) (V) 5.5 IOH (Max) (mA) -32 IOL (Max) (mA) 32 Rating Automotive
SOT-SC70 (DCK) 6 4 mm² 2 x 2.1
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
  • VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • DIR Input Circuit Referenced to VCCA
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Maximum Data Rates
    • 420 Mbps (3.3-V to 5-V Translation)
    • 210 Mbps (Translate to 3.3 V)
    • 140 Mbps (Translate to 2.5 V)
    • 75 Mbps (Translate to 1.8 V)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
  • VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • DIR Input Circuit Referenced to VCCA
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Maximum Data Rates
    • 420 Mbps (3.3-V to 5-V Translation)
    • 210 Mbps (Translate to 3.3 V)
    • 140 Mbps (Translate to 2.5 V)
    • 75 Mbps (Translate to 1.8 V)

The SN74LVC1T45-Q1 device is a single-bit, noninverting bus transceiver that uses two separate configurable power supply rails. The A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B-port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC1T45-Q1 device is a single-bit, non-inverting level translator. The fully configurable dual-rail design allows each port to overate over the full 1.65-V to 5.5-V power supply range. It is ideal for applications that need a wide bidirectional translation range.

The SN74LVC1T45-Q1 is designed so that the DIR input is powered by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.

The SN74LVC1T45-Q1 device is a single-bit, noninverting bus transceiver that uses two separate configurable power supply rails. The A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B-port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC1T45-Q1 device is a single-bit, non-inverting level translator. The fully configurable dual-rail design allows each port to overate over the full 1.65-V to 5.5-V power supply range. It is ideal for applications that need a wide bidirectional translation range.

The SN74LVC1T45-Q1 is designed so that the DIR input is powered by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.

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Technical documentation

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Type Title Date
* Data sheet SN74LVC1T45-Q1 1.65-V to 5.5-V Single-Bit Dual-Supply Level Shifter datasheet (Rev. D) 30 Jul 2017
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
More literature Automotive Logic Devices Brochure 27 Aug 2014
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 May 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note LVC Characterization Information 01 Dec 1996
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 Sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic EVM supporting 5 through 8 pin DCK, DCT, DCU, DRL, and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
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Evaluation board

AVCLVCDIRCNTRL-EVM — Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)

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SC70 (DCK) 6 View options

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