This dual 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G00 device performs the Boolean function Y = A × B or Y = A + B in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Inputs per channel||IOL (Max) (mA)||IOH (Max) (mA)||Input type||Output type||Features||Rating||Data rate (Max) (Mbps)||Operating temperature range (C)||Package size: mm2:W x L (PKG)||Package Group|
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)
|Catalog||100||-40 to 125||
8DSBGA: 3 mm2: 2.25 x 1.25 (DSBGA | 8)
8SM8: 12 mm2: 4 x 2.95 (SM8 | 8)
8VSSOP: 6 mm2: 3.1 x 2 (VSSOP | 8)
DSBGA | 8
SM8 | 8
VSSOP | 8