2-Bit Dual Supply Transceiver with Configurable Voltage-Level Shifting and 3-State Outputs
Product details
Parameters
Package | Pins | Size
Features
- Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
- VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
- DIR Input Circuit Referenced to VCCA
- Low Power Consumption, 4-µA Max ICC
- Available in the Texas Instruments NanoFree™ Package
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
- Max Data Rates
- 420 Mbps (3.3-V to 5-V Translation)
- 210 Mbps (Translate to 3.3 V)
- 140 Mbps (Translate to 2.5 V)
- 75 Mbps (Translate to 1.8 V)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 4000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
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Description
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74LVC2T45 is designed so that the DIR input circuit is supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Description
The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)
Features
- SMB connector available for high speed operation
- Ground port available on each header pin to maintain signal integrity
- DIR and OE have 10K ohm pull up /pull down resistor options
- Designed to support up to 20 different devices
Design tools & simulation
Reference designs
Design files
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download TIDA-010026 BOM.pdf (55KB) -
download TIDA-010026 Assembly Drawing.pdf (234KB) -
download TIDA-010026 PCB.pdf (1079KB) -
download TIDA-010026 CAD Files.zip (1240KB) -
download TIDA-010026 Gerber.zip (1311KB)
Design files
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download TIDA-01630 BOM.pdf (149KB) -
download TIDA-01630 Assembly Drawing.pdf (275KB) -
download TIDA-01630 PCB.pdf (1307KB) -
download TIDA-01630 CAD Files.zip (1452KB) -
download TIDA-01630 Gerber.zip (1575KB)
Design files
-
download TIDA-01401 BOM.pdf (199KB) -
download TIDA-01401 Assembly Drawing.pdf (218KB) -
download TIDA-01401 PCB.pdf (1302KB) -
download TIDA-01401 CAD Files.zip (8439KB) -
download TIDA-01401 Gerber.zip (1734KB)
Design files
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download Ultrasonic Waterflow Measurement Gerber BOM.pdf (99KB) -
download Ultrasonic Waterflow Measurement Gerber Assembly Drawing.pdf (91KB) -
download Ultrasonic Waterflow Measurement Gerber Layer Plots.zip (399KB) -
download Ultrasonic Waterflow Measurement Gerber CAD FIles.zip (214KB) -
download Ultrasonic Waterflow Measurement Gerber.zip (81KB) -
download Ultrasonic Waterflow Measurement Gerber Software.zip (129KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
DSBGA (YZP) | 8 | View options |
SM8 (DCT) | 8 | View options |
VSSOP (DCU) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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