Product details

Number of channels (#) 2 Architecture DSL Line Driver Total supply voltage (Min) (+5V=5, +/-5V=10) 4.5 Total supply voltage (Max) (+5V=5, +/-5V=10) 33 BW @ Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (Typ) (nV/rtHz) 1.6 Vn at 1 kHz (Typ) (nV/rtHz) 1.9 Iq per channel (Typ) (mA) 7.5 Vos (offset voltage @ 25 C) (Max) (mV) 6 Rail-to-rail No Operating temperature range (C) -40 to 85, 0 to 70 CMRR (Typ) (dB) 95 Input bias current (Max) (pA) 10000000 Offset drift (Typ) (uV/C) 20 GBW (Typ) (MHz) 100 Output current (Typ) (mA) 90 2nd harmonic (dBc) 91 3rd harmonic (dBc) 109 @ MHz 1
Number of channels (#) 2 Architecture DSL Line Driver Total supply voltage (Min) (+5V=5, +/-5V=10) 4.5 Total supply voltage (Max) (+5V=5, +/-5V=10) 33 BW @ Acl (MHz) 100 Acl, min spec gain (V/V) 1 Vn at flatband (Typ) (nV/rtHz) 1.6 Vn at 1 kHz (Typ) (nV/rtHz) 1.9 Iq per channel (Typ) (mA) 7.5 Vos (offset voltage @ 25 C) (Max) (mV) 6 Rail-to-rail No Operating temperature range (C) -40 to 85, 0 to 70 CMRR (Typ) (dB) 95 Input bias current (Max) (pA) 10000000 Offset drift (Typ) (uV/C) 20 GBW (Typ) (MHz) 100 Output current (Typ) (mA) 90 2nd harmonic (dBc) 91 3rd harmonic (dBc) 109 @ MHz 1
HVSSOP (DGN) 8 9 mm² 3 x 3 SOIC (D) 8 19 mm² 3.91 x 4.9
  • ADSL Differential Receiver
  • Low 1.6 nV/)
  • 5 V, ±5 V to ±15 V Typical Operation
  • Available in Standard SOIC or MSOP PowerPAD™ Package
  • PowerPAD is a trademark of Texas Instruments.

    • ADSL Differential Receiver
    • Low 1.6 nV/)
  • 5 V, ±5 V to ±15 V Typical Operation
  • Available in Standard SOIC or MSOP PowerPAD™ Package
  • PowerPAD is a trademark of Texas Instruments.

    The THS6062 is a high-speed differential receiver designed for ADSL data communication systems. Its very low 1.6 nV/), exceeding the distortion requirements of ADSL CODECs. The THS6062 is a voltage feedback amplifier offering a high 100-MHz bandwidth and 100-V/µs slew rate and is stable at gains of 2(-1) or greater. It operates over a wide range of power supply voltages including 5 V and ±5 V to ±15 V. This device is available in standard SOIC or MSOP PowerPAD package. The small, surface-mount, thermally-enhanced MSOP PowerPAD package is fully compatible with automated surface-mount assembly procedures.

    The THS6062 is a high-speed differential receiver designed for ADSL data communication systems. Its very low 1.6 nV/), exceeding the distortion requirements of ADSL CODECs. The THS6062 is a voltage feedback amplifier offering a high 100-MHz bandwidth and 100-V/µs slew rate and is stable at gains of 2(-1) or greater. It operates over a wide range of power supply voltages including 5 V and ±5 V to ±15 V. This device is available in standard SOIC or MSOP PowerPAD package. The small, surface-mount, thermally-enhanced MSOP PowerPAD package is fully compatible with automated surface-mount assembly procedures.

    Download

    Technical documentation

    star = Top documentation for this product selected by TI
    No results found. Please clear your search and try again.
    View all 5
    Type Title Date
    * Data sheet Low-Noise ADSL Dual Differential Receiver datasheet (Rev. D) 15 Oct 2007
    E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
    Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005
    Application note Active Output Impedance for ADSL Line Drivers 26 Nov 2002
    User guide THS6062 EVM User's Guide 21 Jan 1999

    Design & development

    For additional terms or required resources, click any title below to view the detail page where available.

    Simulation model

    THS6062 TINA-TI Reference Design (Rev. B)

    SLAC108B.TSC (98 KB) - TINA-TI Reference Design
    Simulation model

    THS6062 TINA-TI Spice Model (Rev. A)

    SLAM037A.ZIP (4 KB) - TINA-TI Spice Model
    Simulation model

    THS6062 PSpice Model (Rev. B)

    SLOJ011B.ZIP (39 KB) - PSpice Model
    Simulation tool

    PSPICE-FOR-TI — PSpice® for TI design and simulation tool

    PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
    Simulation tool

    TINA-TI — SPICE-based analog simulation program

    TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
    Package Pins Download
    HVSSOP (DGN) 8 View options
    SOIC (D) 8 View options

    Ordering & quality

    Information included:
    • RoHS
    • REACH
    • Device marking
    • Lead finish/Ball material
    • MSL rating/Peak reflow
    • MTBF/FIT estimates
    • Material content
    • Qualification summary
    • Ongoing reliability monitoring

    Support & training

    TI E2E™ forums with technical support from TI engineers

    Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

    If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

    Videos