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Product details

Parameters

Number of channels (#) 1 Architecture PLC Line Driver Total supply voltage (Min) (+5V=5, +/-5V=10) 8 Total supply voltage (Max) (+5V=5, +/-5V=10) 32 BW @ Acl (MHz) 128 Acl, min spec gain (V/V) 5 Vn at flatband (Typ) (nV/rtHz) 2.7 Vn at 1 kHz (Typ) (nV/rtHz) 9 Iq per channel (Typ) (mA) 19.5 Vos (offset voltage @ 25 C) (Max) (mV) 12 Rail-to-rail No Features Shutdown, Adj Bias Operating temperature range (C) -40 to 85 CMRR (Typ) (dB) 64 Input bias current (Max) (pA) 6000000 Offset drift (Typ) (uV/C) -40 GBW (Typ) (MHz) 128 Output current (Typ) (mA) 400 2nd harmonic (dBc) 98 3rd harmonic (dBc) 89 @ MHz 1 open-in-new Find other Line drivers

Package | Pins | Size

VQFN (RGT) 16 9 mm² 3 x 3 VQFN (RHF) 24 20 mm² 5 x 4 open-in-new Find other Line drivers

Features

  • Supply range (VS): 8 V to 32 V
  • Integrated midsupply common-mode buffer
  • Large-signal bandwidth: 195 MHz (VO = 16 VPP)
  • Slew rate (16 V step): 5500 V/µs
  • Low distortion (VS = 12 V, 50 Ω load):
    • HD2: –80 dBc (1 MHz)
    • HD3: –90 dBc (1 MHz)
  • Output current: 338 mA (VS = 12 V, 25 Ω load)
  • Wide output swing (VS = 12 V):
    • 19.4 VPP (100 Ω load)
    • 18.6 VPP (50 Ω load)
  • Adjustable power modes:
    • Full-bias mode: 19.5 mA
    • Mid-bias mode: 15 mA
    • Low-bias mode: 10.4 mA
    • Low-power shutdown mode
    • IADJ pin for variable bias
  • Integrated overtemperature protection
  • Pin-compatible with the 24-pin THS6212 VQFN
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Description

The THS6222 is a differential line-driver amplifier with a current-feedback architecture manufactured using Texas Instruments’ proprietary, high-speed, silicon-germanium (SiGe) process. The device is targeted for use in broadband, high-speed, power line communications (HPLC) line driver applications that require high linearity when driving heavy line loads.

The unique architecture of the THS6222 uses minimal quiescent current while achieving very high linearity. The amplifier has an adjustable current pin (IADJ) that sets the nominal current consumption along with the multiple bias modes that allow for enhanced power savings where the full performance of the amplifier is not required. Shutdown bias mode provides further power savings during receive mode in time division multiplexed (TDM) systems while maintaining high output impedance. The integrated midsupply common-mode buffer eliminates external components, reducing system cost and board space.

The wide output swing of 57 VPP (100 Ω load) with32-V power supplies, coupled with over 650 mA current drive (25 Ω load), allows for wide dynamic range that keeps distortion minimal.

The THS6222 is available in a 24-pin VQFN package with exposed thermal pad and is specified for operation from –40°C to +85°C ambient temperature.

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Technical documentation

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Type Title Date
* Data sheet THS6222 8 V to 32 V, Differential HPLC Line Driver with Common-Mode Buffer datasheet (Rev. D) Apr. 21, 2021
User guide THS6222RHF Evaluation Module Aug. 21, 2019
Application note Noise Analysis for High Speed Op Amps (Rev. A) Jan. 17, 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
99
Description
This evaluation module is designed to quickly and easily demonstrate the functionality and versatility of the amplifier. The EVM is ready to connect to power, signal sources, and test instruments through the use of onboard connectors. The EVM comes configured for easy connection with common (...)
Features
  • Configured for split-supply operation and easily modified for single supply
  • Default gain of 10 V/V configuration can easily be reconfigured for other gains
  • Designed for easy connection to standard 50-Ω input/output impedance test equipment
  • Inputs and outputs include subminiature version A (SMA (...)

Design tools & simulation

SIMULATION MODEL Download
SBOMB04D.TSC (951 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SBOMB93C.ZIP (214 KB) - PSpice Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
(YS) 0 View options
VQFN (RGT) 16 View options
VQFN (RHF) 24 View options

Ordering & quality

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