Product details

Number of channels (#) 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Total supply voltage (Max) (+5V=5, +/-5V=10) 30 BW @ Acl (MHz) 125 Acl, min spec gain (V/V) 19 Vn at flatband (Typ) (nV/rtHz) 6.3 Vn at 1 kHz (Typ) (nV/rtHz) 13 Iq per channel (Typ) (mA) 23.5 Vos (offset voltage @ 25 C) (Max) (mV) 5 Rail-to-rail No Features Shutdown, Adjustable BW/IQ/IOUT Operating temperature range (C) -40 to 85 Input bias current (Max) (pA) 6200000 Offset drift (Typ) (uV/C) 15 GBW (Typ) (MHz) 125 Output current (Typ) (mA) 383 2nd harmonic (dBc) 91 3rd harmonic (dBc) 91 @ MHz 1
Number of channels (#) 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Total supply voltage (Max) (+5V=5, +/-5V=10) 30 BW @ Acl (MHz) 125 Acl, min spec gain (V/V) 19 Vn at flatband (Typ) (nV/rtHz) 6.3 Vn at 1 kHz (Typ) (nV/rtHz) 13 Iq per channel (Typ) (mA) 23.5 Vos (offset voltage @ 25 C) (Max) (mV) 5 Rail-to-rail No Features Shutdown, Adjustable BW/IQ/IOUT Operating temperature range (C) -40 to 85 Input bias current (Max) (pA) 6200000 Offset drift (Typ) (uV/C) 15 GBW (Typ) (MHz) 125 Output current (Typ) (mA) 383 2nd harmonic (dBc) 91 3rd harmonic (dBc) 91 @ MHz 1
VQFN (RHB) 32 25 mm² 5 x 5
  • Digitally-Adjustable Quiescent Current:
    7.6mA to 23.0mA
  • 1.0mA Bias Current Step
  • Independent Voltage Boost and Main Line Driver Disable
  • Low-Power Line Termination Mode
  • Full Capacitor Recharge: 3ms
  • Low Input Voltage Noise Density:
    6.3 nV/√Hz Input-Referred Voltage Noise
  • Low MTPR Distortion:
    70dB with +19.8dBm G.993.2—Profile 8b
  • –91dBc HD3 (1MHz, 60Ω Differential)
  • High Output Current: (383mA into 60Ω)
  • Wide Output Swing: 40VPP (+12V, 60Ω Differential Load with a 1:1.4 Transformer)
  • Wide Bandwidth: 125MHz
  • Port-to-Port Separation of 90dB at 1MHz
  • PSRR: 70dB at 1MHz for Good Isolation
  • APPLICATIONS
    • Ideal for All VDSL2 Profiles
    • Backwards-Compatible with ADSL/ADSL2+/ADSL2++ Systems

    PowerPAD is a trademark of Texas Instruments, Inc.
    All other trademarks are the property of their respective owners

    • Digitally-Adjustable Quiescent Current:
      7.6mA to 23.0mA
    • 1.0mA Bias Current Step
    • Independent Voltage Boost and Main Line Driver Disable
    • Low-Power Line Termination Mode
    • Full Capacitor Recharge: 3ms
    • Low Input Voltage Noise Density:
      6.3 nV/√Hz Input-Referred Voltage Noise
    • Low MTPR Distortion:
      70dB with +19.8dBm G.993.2—Profile 8b
    • –91dBc HD3 (1MHz, 60Ω Differential)
    • High Output Current: (383mA into 60Ω)
    • Wide Output Swing: 40VPP (+12V, 60Ω Differential Load with a 1:1.4 Transformer)
    • Wide Bandwidth: 125MHz
    • Port-to-Port Separation of 90dB at 1MHz
    • PSRR: 70dB at 1MHz for Good Isolation
  • APPLICATIONS
    • Ideal for All VDSL2 Profiles
    • Backwards-Compatible with ADSL/ADSL2+/ADSL2++ Systems

    PowerPAD is a trademark of Texas Instruments, Inc.
    All other trademarks are the property of their respective owners

    The THS6226 is a dual-port, class H, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable native DTM signals while supporting greater than +20.5dBm line power (up to 8.5MHz) with good linearity, supporting the G.993.2 VDSL2 8b profile. It is also fast enough to support central-office transmission of +14.5dBm line power up to 30MHz.

    The unique architecture of the THS6226 allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is –91dBc at 1MHz and reduces to only –75dBc at 5MHz. Fixed multiple bias settings of the amplifiers offer enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings on all profiles, quiescent current is digitally adjustable from 7.6mA to 23mA with a bias current step of 1.0mA. For systems where additional power savings while not transmitting are desired, the THS6226 can be used in its line termination mode to maintain impedance matching.

    The wide output swing on +12V power supplies, coupled with excellent current drive, allows for wide dynamic headroom, keeping distortion minimal.

    The THS6226 is available in a QFN-32 PowerPAD™ package.

    The THS6226 is a dual-port, class H, current-feedback architecture, differential line driver amplifier system ideal for xDSL systems. The device is targeted for use in very-high-bit-rate digital subscriber line 2 (VDSL2) line driver systems that enable native DTM signals while supporting greater than +20.5dBm line power (up to 8.5MHz) with good linearity, supporting the G.993.2 VDSL2 8b profile. It is also fast enough to support central-office transmission of +14.5dBm line power up to 30MHz.

    The unique architecture of the THS6226 allows quiescent current to be minimal while still achieving very high linearity. Differential distortion, under full bias conditions, is –91dBc at 1MHz and reduces to only –75dBc at 5MHz. Fixed multiple bias settings of the amplifiers offer enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings on all profiles, quiescent current is digitally adjustable from 7.6mA to 23mA with a bias current step of 1.0mA. For systems where additional power savings while not transmitting are desired, the THS6226 can be used in its line termination mode to maintain impedance matching.

    The wide output swing on +12V power supplies, coupled with excellent current drive, allows for wide dynamic headroom, keeping distortion minimal.

    The THS6226 is available in a QFN-32 PowerPAD™ package.

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    Technical documentation

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    Type Title Date
    * Data sheet Gated-Class H, Dual-Port, VDSL2 Line Driver datasheet (Rev. C) 26 Apr 2011
    E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
    Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005

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