Product details

Function General-purpose timer Iq (typ) (mA) 0.17 Rating Automotive Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 15 Supply voltage (min) (V) 2 TI functional safety category Functional Safety-Capable
Function General-purpose timer Iq (typ) (mA) 0.17 Rating Automotive Operating temperature range (°C) -40 to 125 Supply voltage (max) (V) 15 Supply voltage (min) (V) 2 TI functional safety category Functional Safety-Capable
SOIC (D) 8 29.4 mm² 4.9 x 6
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Functional Safety-Capable
  • Very-low power consumption
    • 1mW (typical) at VDD = 5V
  • Capable of operation in astable mode
  • CMOS output capable of swinging rail to rail
  • High-output-current capability
    • Sink 100mA (typical)
    • Source 10mA (typical)
  • Output fully compatible with CMOS, TTL, and MOS
  • Low supply current reduces spikes during output transitions
  • Single-supply operation from 2V to 15V
  • Temperature range: –40°C to +125°C
  • Functionally interchangeable with the NE555; has same pinout
  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Functional Safety-Capable
  • Very-low power consumption
    • 1mW (typical) at VDD = 5V
  • Capable of operation in astable mode
  • CMOS output capable of swinging rail to rail
  • High-output-current capability
    • Sink 100mA (typical)
    • Source 10mA (typical)
  • Output fully compatible with CMOS, TTL, and MOS
  • Low supply current reduces spikes during output transitions
  • Single-supply operation from 2V to 15V
  • Temperature range: –40°C to +125°C
  • Functionally interchangeable with the NE555; has same pinout

The TLC555-Q1 is a monolithic timing circuit fabricated using TI LinCMOS™ technology. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. As a result of the high input impedance, this device supports smaller timing capacitors than capacitors used by the NE555. Thus, more accurate time delays and oscillations are possible. Power consumption is low across the full power-supply voltage range.

Like the NE555, the TLC555-Q1 has a trigger level equal to approximately one-third of the supply voltage, and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by using the control voltage pin (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set, and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output goes low. The reset input (RESET) can override all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and GND. Tie all unused inputs to an appropriate logic level to prevent false triggering.

The TLC555-Q1 is a monolithic timing circuit fabricated using TI LinCMOS™ technology. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. As a result of the high input impedance, this device supports smaller timing capacitors than capacitors used by the NE555. Thus, more accurate time delays and oscillations are possible. Power consumption is low across the full power-supply voltage range.

Like the NE555, the TLC555-Q1 has a trigger level equal to approximately one-third of the supply voltage, and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by using the control voltage pin (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set, and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output goes low. The reset input (RESET) can override all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and GND. Tie all unused inputs to an appropriate logic level to prevent false triggering.

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Technical documentation

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Type Title Date
* Data sheet TLC555-Q1 Automotive LinCMOS™ Technology Timer datasheet (Rev. C) PDF | HTML 17 Apr 2024
Functional safety information TLC555-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA (Rev. A) PDF | HTML 13 Mar 2023
Technical article Power Tips: Multiply your output voltage PDF | HTML 20 Jul 2016
Design guide EMC Compatible Automotive LED Rear Lamp Sequential-Turn Animation Design Guide 02 Jun 2016
Application note TLC555-Q1 Used as a Positive and Negative Charge Pump 25 May 2016

Design & development

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs

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