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TMS320C6674

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High performance quad-core C66x fixed and floating-point DSP- up to 1.25GHz

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Data sheet
Errata

TMS320C6674

ACTIVE
Data sheet Order now

Product details

DSP type 4 C66x DSP (max) (MHz) 1000 CPU 32-/64-bit Operating system DSP/BIOS Security Crypto accelerators Ethernet MAC 2-Port 1Gb switch PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (°C) -40 to 100
DSP type 4 C66x DSP (max) (MHz) 1000 CPU 32-/64-bit Operating system DSP/BIOS Security Crypto accelerators Ethernet MAC 2-Port 1Gb switch PCIe 2 PCIe Gen2 Rating Catalog Operating temperature range (°C) -40 to 100
FCBGA (CYP) 841 576 mm² 24 x 24
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.25GHz
    • 160 GMAC/80 GFLOP @ 1.25GHz
    • 32KB L1P, 32KB L1D, 512KB L2 Per Core
    • 4MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • 16-Bit EMIF - Async SRAM, NAND and NOR Flash Support
  • Two Telecom Serial Ports (TSIP) - 2/4/8 Lanes at 32.768/16.384/8.192
  • UART Interface
  • I2C Interface
  • 16 GPIO Pins
  • SPI Interface
  • Sixteen 64-Bit Timers
  • Three On-Chip PLLs
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.25GHz
    • 160 GMAC/80 GFLOP @ 1.25GHz
    • 32KB L1P, 32KB L1D, 512KB L2 Per Core
    • 4MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • 16-Bit EMIF - Async SRAM, NAND and NOR Flash Support
  • Two Telecom Serial Ports (TSIP) - 2/4/8 Lanes at 32.768/16.384/8.192
  • UART Interface
  • I2C Interface
  • 16 GPIO Pins
  • SPI Interface
  • Sixteen 64-Bit Timers
  • Three On-Chip PLLs

The TMS320C6674 Multicore Fixed and Floating Point Digital Signal Processor is based on TI's KeyStone multicore architecture. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.25 GHz enabling up to 5 GHz. The device supports high-performance signal processing applications such as mission critical, medical imaging, test, and automation. The C6674 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

The TMS320C6674 Multicore Fixed and Floating Point Digital Signal Processor is based on TI's KeyStone multicore architecture. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.25 GHz enabling up to 5 GHz. The device supports high-performance signal processing applications such as mission critical, medical imaging, test, and automation. The C6674 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

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Technical documentation

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Type Title Date
* Data sheet TMS320C6674 Multicore Fixed and Floating-Point Digital Signal Processor datasheet (Rev. E) 07 May 2014
* Errata TMS320C6674 Multicore Fixed & Floating-Point DSP Silicon Errata (Revs 1.0, 2.0) (Rev. H) 29 Jun 2015
Application note DDR3 Design Requirements for KeyStone Devices (Rev. D) PDF | HTML 07 Jul 2022
Application note Keystone Error Detection and Correction EDC ECC (Rev. A) 25 Jun 2021
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML 19 May 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 01 Jun 2020
Application note Using DSPLIB FFT Implementation for Real Input and Without Data Scaling PDF | HTML 11 Jun 2019
Application note Keystone Bootloader Resources and FAQ 29 May 2019
Application note Keystone Multicore Device Family Schematic Checklist PDF | HTML 17 May 2019
Application note Hardware Design Guide for KeyStone Devices (Rev. D) 21 Mar 2019
Application note KeyStone I DDR3 interface bring-up 06 Mar 2019
White paper Designing professional audio mixers for every scenario 28 Jun 2018
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) 14 Aug 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) 26 Jul 2017
Application note KeyStone I DDR3 Initialization (Rev. E) 28 Oct 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices 13 Apr 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs 23 Feb 2016
Application note TI DSP Benchmarking 13 Jan 2016
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) 06 May 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) PDF | HTML 09 Apr 2015
White paper TI’s processors leading the way in embedded analytics 03 Mar 2015
User guide DDR3 Memory Controller for KeyStone I Devices User's Guide (Rev. E) 20 Jan 2015
Application note TI Keystone DSP Hyperlink SerDes IBIS-AMI Models 09 Oct 2014
Application note TI Keystone DSP PCIe SerDes IBIS-AMI Models 09 Oct 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) 04 Sep 2014
User guide Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) 03 Sep 2014
More literature KeyStone Lab Manual - Training 05 Jun 2014
User guide System Analyzer User's Guide (Rev. F) 18 Nov 2013
User guide PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) 30 Sep 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) 15 Jul 2013
White paper Another Look at the Future of Medical Processing 12 Jul 2013
White paper Medical Software Development on Keystone Devices 12 Jul 2013
White paper Accelerating high-performance computing development with Desktop Linux SDK 08 Jul 2013
User guide Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) 03 Jul 2013
User guide C66x CorePac User's Guide (Rev. C) 28 Jun 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) 28 Jun 2013
User guide HyperLink for KeyStone Devices User's Guide (Rev. C) 28 May 2013
User guide Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) 05 Feb 2013
Product overview Multicore DSPs for High-Performance Video Coding 22 Jan 2013
Product overview OpenMP Programming for TMS320C66x Multicore DSPs (Rev. A) 05 Nov 2012
Application note SerDes Implementation Guidelines for KeyStone I Devices 31 Oct 2012
Product overview TMS320C66x high-performance multicore DSPs for video surveillance 06 Sep 2012
Application note Multicore Programming Guide (Rev. B) 29 Aug 2012
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 21 Aug 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 21 Aug 2012
User guide Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) 11 Jul 2012
White paper Leveraging multicore processors for machine vision applications 09 May 2012
User guide Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) 24 Apr 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) 30 Mar 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) 27 Mar 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) 22 Mar 2012
White paper Maximizing Multicore Efficiency with Navigator Runtime 23 Feb 2012
Application note PCIe Use Cases for KeyStone Devices 13 Dec 2011
User guide Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide (Rev. A) 15 Oct 2011
Application note Introduction to TMS320C6000 DSP Optimization 06 Oct 2011
User guide Debug and Trace for KeyStone I Devices User's Guide (Rev. A) 22 Sep 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide 02 Sep 2011
White paper KeyStone Multicore SoC Tool Suite: one platform for all needs 17 Jun 2011
User guide External Memory Interface (EMIF16) for KeyStone Devices User's Guide (Rev. A) 24 May 2011
White paper Software and Hardware Design Challenges Due to Dynamic Raw NAND Market 19 May 2011
Product overview TMS320C6671/72/74/78 High-Performance Multicore Fixed- and Floating-Point DSPs (Rev. B) 25 Apr 2011
Application note TMS320C66x DSP Generation of Devices (Rev. A) 25 Apr 2011
White paper KeyStone Memory Architecture White Paper (Rev. A) 21 Dec 2010
User guide C66x CPU and Instruction Set Reference Guide 09 Nov 2010
User guide C66x DSP Cache User's Guide 09 Nov 2010
Application note Clocking Design Guide for KeyStone Devices 09 Nov 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide 09 Nov 2010
Application note Optimizing Loops on the C66x DSP 09 Nov 2010
User guide Telecom Serial Interface Port (TSIP) for KeyStone Devices User's Guide 09 Nov 2010
User guide Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG 09 Nov 2010
User guide Network Coprocessor for KeyStone Devices User's Guide 02 Nov 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

Z3-3P-VIDEO-EVMS — Z3 Technology processors video evaluation modules

Z3 develops and supports open-source software architectures focused on TI's DaVinci and AM57x processors. Products include multimedia centric framework, peripheral drivers, production modules and complete product design services. Z3 also provides system level design and integration for both wired (...)
From: Z3 Technology
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Daughter card

SHELD-3P-DSP-SOMS — Sheldon DSP-FPGA boards

Sheldon Instruments designs and manufactures DSP based, COTS data acquisition and control hardware for PCIe/PCI, PCI104e/PCI104, XMC/PMC, and CompactPCI systems, along with drivers and real time development software for a variety of applications and markets.

Learn more about Sheldon Instruments at (...)
From: Sheldon Instruments, Inc.
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Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Interface adapter

HL5CABLE — Hyperlink Cable

A ½ meter long high speed cable to allow interfacing 2 EVMs via their high performance Hyperlink interfaces. EVMs supported are TMDSEVM6670L, TMDSEVM6678L, TMDSEVM6670LE, TMDSEVM6678LE, TMDSEVM6614LXE and TMDSEVM6618LXE.
Not available on TI.com
Interface adapter

TMDXEVMPCI — AMC to PCIe Adapter Card

This is a passive adapter card that allows select TI EVMs with a AMC header to be converted to a PCIe x4 lane edge connector so it can be inserted into a desktop PC or any where a PCIe header is utilized. The selected TI EVM must support native PCIe on the DSP. This card is a adapter and requires (...)
Not available on TI.com
Software development kit (SDK)

PROCESSOR-SDK-C667X — Processor SDK for C667x Processors - TI-RTOS support

 

Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)

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Driver or library

FFTLIB — FFT Library for Floating Point Devices

The Texas Instruments FFT library is an optimized floating-point math function library for computing the discrete Fourier transform (DFT).
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Driver or library

MATHLIB — DSP Math Library for Floating Point Devices

The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
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Driver or library

SPRC264 — TMS320C5000/6000 Image Library (IMGLIB)

C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
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Driver or library

SPRC265 — TMS320C6000 DSP Library (DSPLIB)

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
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Driver or library

TELECOMLIB — Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
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IDE, configuration, compiler or debugger

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

Supported products & hardware

Supported products & hardware

This design resource supports most products in these categories.

Check the product details page to verify support.
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IDE, configuration, compiler or debugger

SPNC016 — TMS570 HET IDE v03.05.01

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
SM320C6678-HIREL — High reliability product high performance 8-core C6678 fixed and floating-point DSP TMS320C6671 — High performance single-core C66x fixed and floating-point DSP - 1GHz TMS320C6672 — High performance dual-core C66x fixed and floating-point DSP- up to 1.25GHz TMS320C6674 — High performance quad-core C66x fixed and floating-point DSP- up to 1.25GHz TMS320C6678 — High performance octo-core C66x fixed and floating-point DSP- up to 1.25GHz
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Software codec

C66XCODECS — CODECS- Video, Speech - for C66x-based Devices

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. In many cases, the C64x+ codecs are provided and validated for C66x platforms. Datasheets and Release Notes are on the download (...)
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Simulation model

C6674 CYP BSDL Model

SPRM526.ZIP (26 KB) - BSDL Model
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Simulation model

C6674 Power Consumption Model (Rev. A)

SPRM559A.ZIP (106 KB) - Power Model
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Simulation model

KeyStone I SerDes IBIS AMI Models

SPRM742.ZIP (969314 KB) - IBIS Model
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Simulation model

TMS320C6678/74/72/71 CYP BSDL Model (Silicon Revision 2)

SPRM575.ZIP (24 KB) - BSDL Model
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Schematic

TMS320C6678/4/2/1 CYP OrCAD Symbols (Rev. B)

SPRR159B.ZIP (133 KB)
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Schematic

TMS320C6678/4/2/1 Thermal Model

SPRR185.ZIP (3 KB)
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Reference designs

TIDEP0045 — Implementing a Real-time Synthetic Aperture Radar (SAR) Algorithm on TI’s C6678 DSP Reference Design

This reference design shows a real-time synthetic aperture radar (SAR) running on a multicore TMS320C6678 digital signal processor (DSP). One of the main challenges of  SAR is to generate high-resolution images in real-time, since forming the image involves computationally-demanding signal (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDEP0037 — Using TMS320C6678 Processor to Implement Power Efficient Scalable H.265/HEVC Solution Ref Design

HEVC is an efficient, but processing intensive video standard, that is said to double the data compression ratio compared to H.264 / MPEG-4 at the same level of video quality. This design shows how a power efficient, soft H.265 / HEVC solution, that scales across resolutions, frame rates and (...)
Design guide: PDF
Schematic: PDF
Reference designs

TIDEP0011 — Power Solution for C667x DSP AVS Core (CVDD) with Dynamic Voltage Scaling

This reference design aims to supply the AVS core supply (CVDD) in the Keystone Multicore DSPs, mainly the C66x series. The C66x series uses SmartReflex technology to enable the DSP to control its supply voltage. In order to meet this requirement, this design combines a Synchronous Buck Converter (...)
Test report: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
FCBGA (CYP) 841 Ultra Librarian
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