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Product details

Parameters

Arm CPU 1 Arm9 Arm MHz (Max.) 135, 216, 270 DSP 0 Operating system Neutrino, PrOS, Integrity, Windows Embedded CE, Linux Video acceleration 1 MJCP Video port (configurable) 1 Dedicated Input, 1 Dedicated Output On-chip L2 cache/RAM 0 DRAM LPDDR, DDR2 PCI/PCIe 0 Ethernet MAC 0 USB 1 SPI 3 I2C 1 UART (SCI) 3 Operating temperature range (C) -40 to 100, 0 to 85 Rating Catalog open-in-new Find other Audio & media processors

Package | Pins | Size

NFBGA (ZCE) 337 169 mm² 13 x 13 open-in-new Find other Audio & media processors

Features

  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • High-Performance Digital Media System-on-Chip (DMSoC)
  • Up to 270-MHz ARM926EJ-S™ Clock Rate
  • MPEG4/JPEG Coprocessor Supports
    • Up to 720p MPEG4 SP
    • Up to 50M Pixels per Second JPEG
  • Video Processing Subsystem
    • Hardware IPIPE for Real-Time Image Processing
    • Up to 14-bit CCD/CMOS Digital Interface
    • Histogram Module
    • Resize Image 1/16x to 8x
    • Hardware On-Screen Display
    • Supports digital HDTV (720p/1080i) output for connection to external encoder
  • Peripherals include DDR and mDDR SDRAM, 2 MMC/SD/SDIO and SmartMedia Flash Card Interfaces, USB 2.0, 3 UARTs and 3 SPIs
  • Configurable Power-Saving Modes
  • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, or UART
  • Extended Temperature 135- and 216-MHz Devices are Available
  • 3.3-V and 1.8-V I/O, 1.3-V Core
  • Debug Interface Support
  • 337-Pin Ball Grid Array at 65 nm Process Technology
  • High-Performance Digital Media System-on-Chip
    • 135-, 216-, and 270-MHz ARM926EJ-S Clock Rate
    • Fully Software-Compatible With ARM9
    • Extended Temperature support for 135- and 216-Mhz Devices are Available
  • ARM926EJ-S Core
    • Support for 32-Bit and 16-Bit (Thumb Mode) Instruction Sets
    • DSP Instruction Extensions and Single Cycle MAC
    • ARM® Jazelle® Technology
    • EmbeddedICE-RT™ Logic for Real-Time Debug
  • ARM9 Memory Architecture
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • 32K-Byte RAM
    • 8K-Byte ROM
    • Little Endian
  • MPEG4/JPEG Coprocessor
    • Fixed Function Coprocessor Supports:
      • MPEG4 SP Codec at HD (720p), D1, VGA, SIF
      • JPEG Codec up to 50M Pixels per Second
  • Video Processing Subsystem
    • Front End Provides:
      • Hardware IPIPE for Real-Time Processing
      • up to 14-bit CCD/CMOS Digital Interface
      • 16-/8-bit Generic YcBcR-4:2 Interface (BT.601)
      • 10-/8-bit CCIR6565/BT655 Interface
      • Up to 75-MHz Pixel Clock
      • Histogram Module
      • Resize Engine
        • Resize Images From 1/16x to 8x
        • Separate Horizontal/Vertical Control
        • Two Simultaneous Output Paths
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Composite NTSC/PAL video encoder output
      • 8-/16-bit YCC and Up to 18-Bit RGB666 Digital Output
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Supports digital HDTV (720p/1080i) output for connection to external encoder
  • External Memory Interfaces (EMIFs)
    • DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
    • Asynchronous16-/8-bit Wide EMIF (AEMIF)
      • Flash Memory Interfaces
        • NAND (8-/16-bit Wide Data)
        • OneNAND(16-bit Wide Data)
  • Flash Card Interfaces
    • Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
    • SmartMedia
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • USB Port with Integrated 2.0 High-Speed PHY that Supports
    • USB 2.0 Full and High-Speed Device
    • USB 2.0 Low, Full, and High-Speed Host
  • Three 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
  • One 64-Bit Watch Dog Timer
  • Three UARTs (One fast UART with RTS and CTS Flow Control)
  • Three Serial Port Interfaces (SPI) each with two Chip-Selects
  • One Master/Slave Inter-Integrated Circuit (I2C) Bus®
  • Two Audio Serial Port (ASP)
    • I2S and TDM I2S
    • AC97 Audio Codec Interface
    • S/PDIF via Software
    • Standard Voice Codec Interface (AIC12)
    • SPI Protocol (Master Mode Only)
  • Four Pulse Width Modulator (PWM) Outputs
  • Four RTO (Real Time Out) Outputs
  • Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
  • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, or UART
  • Configurable Power-Saving Modes
  • Crystal or External Clock Input (typically 24 MHz or 36 MHz)
  • Flexible PLL Clock Generators
  • Debug Interface Support
    • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
    • ETB (Embedded Trace Buffer) with 4K-Bytes Trace Buffer memory
    • Device Revision ID Readable by ARM
  • 337-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
  • 90nm Process Technology
  • 3.3-V and 1.8-V I/O, 1.3-V Internal

Windows is a trademark of Microsoft.
All other trademarks are the property of their respective owners.

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Description

The DM355 is a highly integrated, programmable platform for digital still camera, digital photo frames, IP security cameras, 4-channel digital video recorders, video door bell application, and other low cost portable digital video applications. Designed to offer portable video designers and manufacturers the ability to produce affordable portable digital video solutions with high picture quality, the DM355 combines high performance MPEG4 HD (720p) codecs and JPEG codecs up to 50M pixels per second, high quality, and low power consumption at a very low price point. The DM355 also enables seamless interface to most additional external devices required for a complete digital camera implementation. The interface is flexible enough to support various types of CCD and CMOS sensors, signal conditioning circuits, power management, DDR/mDDR memory, SRAM, NAND, shutter, Iris and auto-focus motor controls, etc.

The DM355 processor core is an ARM926EJ-S RISC processor. The ARM926EJ-S is a 32-bit processor core that performs 32-bit and 16-bit instructions and processes 32-bit, 16-bit, and 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously. The ARM core incorporates:

  • A coprocessor 15 (CP15) and protection module
  • Data and program Memory Management Units (MMUs) with table look-aside buffers.
  • Separate 16K-byte instruction and 8K-byte data caches. Both are four-way associative with virtual index virtual tag (VIVT).

DM355 performance is enhanced by its MPEG4/JPEG coprocessor. The MPEG4/JPEG coprocessor performs the computational operations required for image processing; JPEG compression and MPEG4 video and imaging standard. The MPEG4/JPEG coprocessor supports MPEG4 SP at HD (720p), D1, VGA, SIF encode/decode resolutions and JPEG encode/decode up to 50M pixels per second.

The DM355 device has a Video Processing Subsystem (VPSS) with two configurable video/imaging peripherals:

  • A Video Processing Front-End (VPFE)
  • A Video Processing Back-End (VPBE)

The VPFE port provides an interface for CCD/CMOS imager modules and video decoders. The VPBE provides hardware On Screen Display (OSD) support and composite NTSC/PAL and digital LCD output.

The DM355 peripheral set includes:

  • An inter-integrated circuit (I2C) Bus interface
  • Two audio serial ports (ASP)
  • Three 64-bit general-purpose timers each configurable as two independent 32-bit timers
  • A 64-bit watchdog timer
  • Up to 104-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals
  • Three UARTs with hardware handshaking support on one UART
  • Three serial port Interfaces (SPI)
  • Four pulse width modulator (PWM) peripherals
  • Four real time out (RTO) outputs
  • Two Multi-Media Card / Secure Digital (MMC/SD/SDIO) interfaces
  • Wireless interfaces (Bluetooth, WLAN, WUSB) through SDIO
  • A USB 2.0 full and high-speed device and host interface
  • Two external memory interfaces:
    • An asynchronous external memory interface (AEMIF) for slower memories/peripherals such as NAND and OneNAND.
    • A high speed synchronous memory interface for DDR2/mDDR.

For software development support the DM355 has a complete set of ARM development tools which include: C compilers, assembly optimizers to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

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Download

No TI direct design support available

This product does not have ongoing direct TI design support for new projects, such as new content or software updates. If relevant existing collateral, software and tools are available, you can find them on the product folder. You may also search for archived information in the TI E2ETM support forums.

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 41
Type Title Date
* Datasheet TMS320DM355 Digital Media System-on-Chip (DMSoC) datasheet (Rev. G) Jun. 24, 2010
* Errata TMS320DM355 Digital Media System-on-Chip Silicon Errata (Revs 1.1, 1.3 and 1.4) (Rev. E) Jun. 24, 2010
User guides SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) Jun. 01, 2020
Application notes High-Speed Interface Layout Guidelines (Rev. H) Oct. 11, 2018
User guides SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. U) Feb. 07, 2018
Application notes Powering the TMS320DM335 and TMS320DM355 with the TPS650061 Oct. 13, 2011
Application notes Migrating From TMS320DM35x to TMS320DM36x Devices (Rev. A) Jun. 02, 2011
More literature Multi-Megapixel Reference Designs (Rev. A) Mar. 22, 2011
Application notes Migrating From TMS320DM355/335 Silicon Revision 1.1 to 1.3 or 1.4 (Rev. B) Jan. 05, 2011
User guides TMS320DM35x DMSoC Pulse-Width Modulator (PWM) User's Guide (Rev. B) Aug. 25, 2010
User guides TMS320DM355 Digital Media System-on-Chip ARM Subsystem Reference Guide (Rev. A) Aug. 04, 2010
Application notes TMS320DM355 Power Consumption for Common Application Usage Scenarios (Rev. A) Jul. 16, 2010
More literature TMS320DM3x DaVinci Video Processors Apr. 11, 2010
Application notes USB Compliance Checklist (Rev. A) Mar. 10, 2010
Application notes Implementing DDR2/mDDR PCB Layout on the TMS320DM35x DMSoC (Rev. D) Nov. 11, 2009
Application notes LSP 2.10 DaVinci Linux Drivers (Rev. A) Jul. 08, 2009
More literature TMS320DM3x Highlights Mar. 03, 2009
More literature Complimentary Analog Devices for DM355 Digital Media Processor Feb. 17, 2009
User guides TMS320DM355 DVEVM v1.30 Getting Started Guide (Rev. B) Dec. 31, 2008
User guides TMS320DM35x Digital Media System-on-Chip Video Processing Back End (VPBE) RG (Rev. C) Oct. 16, 2008
More literature DaVinci Technology Overview Brochure (Rev. B) Sep. 27, 2008
Application notes Migrating from EDMA v2.0 to EDMA v3.0 TMS320C64X DSP (Rev. A) Aug. 21, 2008
Application notes TMS320DM355 DSP Power Reference Design PR742 (Rev. A) Aug. 08, 2008
Application notes Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A) Jul. 17, 2008
User guides TMS320DM35x Digital Media System-on-Chip Video Processing Front End (VPFE) RG (Rev. A) Jun. 30, 2008
Application notes Building a Small Embedded Linux Kernel Example (Rev. A) May 27, 2008
User guides TMS320DM35x DMSoC General-Purpose Input/Output (GPIO) User's Guide (Rev. B) Mar. 18, 2008
User guides TMS320DM35x DMSoC Universal Serial Bus (USB) User's Guide (Rev. C) Mar. 13, 2008
User guides TMS320DM355 DMSoC Peripherals Overview Reference Guide (Rev. A) Dec. 07, 2007
User guides TMS320DM35x DMSoC Multimedia Card(MMC)/Secure Digital(SD)(SDIO) Card Controller (Rev. C) Nov. 28, 2007
User guides TMS320DM35x DMSoC DDR2/mDDR Memory Controller Reference Guide (Rev. D) Nov. 19, 2007
User guides TMS320DM35x DMSoC Asynchronous External Memory Interface (EMIF) User's Guide (Rev. B) Oct. 23, 2007
User guides TMS320DM35x DMSoC Enhanced DMA (EDMA) User's Guide (Rev. A) Oct. 23, 2007
User guides TMS320DM35x DMSoC Serial Peripheral Interface (SPI) User's Guide (Rev. B) Oct. 16, 2007
More literature TMS320DM355 DaVinci FAQ (Rev. A) Sep. 27, 2007
User guides TMS320DM35x Audio Serial Port (ASP) Reference Guide (Rev. C) Sep. 04, 2007
User guides TMS320DM35x DMSoC Inter-Integrated Circuit (I2C) Module User's Guide (Rev. A) Sep. 04, 2007
User guides TMS320DM35x DMSoC Timer/Watchdog Timer User's Guide (Rev. A) Sep. 04, 2007
User guides TMS320DM35x DMSoC Universal Asynchronous Receiver/Transmitter (UART) UG (Rev. B) Sep. 04, 2007
User guides TMS320DM35x Digital Media System-on-Chip Real Time Out (RTO) Reference Guide Sep. 04, 2007
More literature DaVinci Newsletter - Fall 2007 Issue (Rev. B) Aug. 14, 2007

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development

SOFTWARE DEVELOPMENT KITS (SDK) Download
Linux Digital Video Software Development Kits (DVSDK) v2x/v3x - DaVinci Digital Media Processors
LINUXDVSDK-DV Effective Oct 2010 - Linux DVSDK v4 has been released. For DaVinci™ devices not listed above, search TI.com for your device part number; This product page will have a link to your current DVSDK.

The Linux™ Digital Video Software Development Kits (DVSDKs) enable DaVinci system integrators to (...)

Features

All versions of the Linux DaVinci Digital Video Software Development Kits (DVSDK) combine all the software components and tools needed to begin development of multimedia applications on DaVinci technology-based devices. 

 

DVSDK v3.10 - DM355 and DM6467T (1 GHz) – PRODUCTION
The Linux DaVinci DVSDK v3.10 (...)

APPLICATION SOFTWARE & FRAMEWORKS Download
Multimedia Framework Products (MFP) - Codec Engine, Framework Components and XDAIS
TMDMFP Multimedia Framework Products (MFP)

A major advantage of programmable signal processors over fixed-function devices is their ability to accelerate multiple multimedia functions and provide flexible environments to enable user customization. However, sharing scarce embedded hardware resources between (...)

Features

Multimedia Framework Products MFP


MFP is completely open source.  It is distributed under the BSD license (with the exception of kernel mode Linux drivers in the Linux Utils product, which are licensed under GPLv2), and is freely available from TI.

  • XDAIS
    TI's well-proven eXpressDSP Algorithm (...)
DEBUG PROBES Download
XDS200 USB Debug Probe
TMDSEMU200-U The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)
295
Features

The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)

DEBUG PROBES Download
XDS560v2 System Trace USB Debug Probe
TMDSEMU560V2STM-U The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

995
Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBES Download
XDS560v2 System Trace USB & Ethernet Debug Probe
TMDSEMU560V2STM-UE The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

1495
Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

OPERATING SYSTEMS (OS) Download
Mentor Graphics Nucleus RTOS
Provided by Mentor Graphics Corporation — Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify application (...)

Design tools & simulation

SIMULATION MODELS Download
SPRM262B.ZIP (8 KB) - BSDL Model
SIMULATION MODELS Download
SPRM271A.ZIP (234 KB) - IBIS Model
SCHEMATICS Download
SLVR330A.PDF (294 KB)
SCHEMATICS Download
SLVR331B.PDF (381 KB)

Reference designs

REFERENCE DESIGNS Download
Powering the TMS320DM335 and TMS320DM355 with the TPS650061
PR2047 — Low cost integrated power solution for TI - DM335/355 processors
Design files

CAD/CAE symbols

Package Pins Download
NFBGA (ZCE) 337 View options

Ordering & quality

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