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TPD2E2U06-Q1

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Automotive Dual 1.5-pF, 5.5-V, ±25-kV ESD protection diode for USB & High Speed Interfaces

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Automotive Dual 1.5-pF, 5.5-V, ±25-kV ESD protection diode for USB & High Speed Interfaces

TPD2E2U06-Q1

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Data sheet Order now

Product details

Parameters

Number of channels (#) 2 IO capacitance (Typ) (pF) 1.5 Vrwm (V) 5.5 IEC 61000-4-2 contact (+/- kV) 25 IEC 61000-4-5 (A) 5.5 Features — Bi-/uni-directional Uni-Directional IO leakage current (Max) (nA) 10 Rating Automotive Operating temperature range (C) -40 to 125 Dynamic resistance (Typ) (Ω) 0.6 Clamping voltage (V) 9.7 open-in-new Find other ESD protection & TVS surge diodes

Package | Pins | Size

SOT-23 (DBZ) 3 7 mm² 2.92 x 2.37 SOT-SC70 (DCK) 3 3 mm² 2 x 1.3 open-in-new Find other ESD protection & TVS surge diodes

Features

  • AEC-Q101 Qualified
  • IEC 61000-4-2 Level 4 ESD Protection
    • ±25-kV (Contact Discharge)
    • ±30-kV (Air-gap Discharge)
  • ISO 10605 (330 pF, 330 Ω) ESD Protection
    • ±20-kV (Contact Discharge)
    • ±25-kV (Air-gap Discharge)
  • IO Capacitance 1.5-pF (Typical)
  • DC Breakdown Voltage 6.5 V (Minimum)
  • Ultra-Low Leakage Current 10-nA (Maximum)
  • Low ESD Clamping Voltage
  • Industrial Temperature Range: –40°C to +125°C
  • Small Easy-to-Route DBZ and DCK Packages
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Description

The TPD2E2U06-Q1 is a Transient Voltage Suppressor (TVS) Electrostatic Discharge (ESD) protection diode array with low capacitance. This dual-channel ESD protection diode is rated to dissipate ESD strikes above the maximum level specified in the IEC 61000-4-2 international standard. The 1.5-pF line capacitance of the TPD2E2U06-Q1 makes it ideal for protecting interfaces such as USB 2.0, Ethernet, LVDS, Antenna, and I2C.

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Technical documentation

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Type Title Date
* Datasheet TPD2E2U06-Q1 Automotive Dual-Channel High-Speed ESD Protection Device datasheet (Rev. D) Apr. 19, 2016
User guide Generic ESD Evaluation Module User's Guide Apr. 03, 2018
Application note ISO 10605 Application Note Feb. 21, 2018
Selection guide ESD by Interface Selection Guide (Rev. A) Jun. 26, 2017
White paper Designing USB for short-to-battery tolerance in automotive environments Feb. 10, 2016
Application note ESD Layout Guide Mar. 04, 2015
User guide TPD2E2U06QEVM User's Guide Dec. 02, 2014
Application note Design Considerations for System-Level ESD Circuit Protection Sep. 25, 2012
Application note Reading and Understanding an ESD Protection Datasheet May 19, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
Texas Instrument's ESDEVM evaluation module allows the evaluation of most of TI's ESD portfolio. The board comes with all traditional ESD footprints in order to be able to test any number of devices. Devices that need to be tested can be soldered onto their respect footprint and then tested. For the (...)
Features
  • Allows testing of most TI ESD devices
  • Many footprints to allow testing of each part
  • S-parameter testing for signal integrity
View details
EVALUATION BOARD Download
document-generic User guide
49
Description

The TPD2E2U06-Q1EVM contains seven TPD2E2U06-Q1’s. A single TPD2E2U06-Q1 (U1) is configured with two USB 2.0 Type A connectors (USB1 & USB2) for capturing system level tests. A single TPD2E2U06-Q1 (U2) is configured with 4 SMA (J1 – J4) connectors to allow 4-port analysis with a (...)

Features
  • IEC61000-4-2 compliance testing
  • 4-port s-parameter analysis
  • USB 2.0 throughput analysis
  • Electrostatic discharge (ESD) clamping waveforms during an ESD event
View details

Design tools & simulation

SIMULATION MODEL Download
SLLM265A.ZIP (3 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
View details
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI — TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

REFERENCE DESIGNS Download
DLP® auto headlight reference design
TIDA-080007 — This reference design details the design of a control board for the DLP5531-Q1 DMD. The DLP5531-Q1 DMD is a spatial light modulator with over 1.3 million pixels that can steer light to create digitally controlled illumination distributions. The design shows a simplified power architecture with a (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Automotive 2.4A Dual-Port USB Hub Reference Design With Short-to-Battery Protection
TIDA-00887 — The TIDA-00887 is comprised of a two-port USB 2.0 hub with short-to-battery (STB) and short-circuit protection on both downstream ports provided by the TPD3S716-Q1. Both downstream ports are configured either as a custom divider mode or a dedicated charging port (DCP) provided by the TUSB4020BI-Q1 (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Daisy-chained power and data over single pair Ethernet (T1) reference design
TIDA-010076 — The TIDA-010076 shows the transfer of 220-W power and 100-Mbit/s data over SPE. Communication systems in daisy-chain topology need significantly less hardware and wiring than conventional systems in star-topology. When combined with single-pair Ethernet (SPE, 100BASE-T1) and power over data line (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SC70 (DCK) 3 View options
SOT-23 (DBZ) 3 View options

Ordering & quality

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