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Product details

Parameters

Drivers per package 7 Switching voltage (Max) (V) 32 Output voltage (Max) (V) 30 Peak output current (mA) 500 Delay time (Typ) (ns) 250 Input compatibility CMOS, TTL Vol @ lowest spec current (Typ) (mV) 210 Iout/ch (Max) (mA) 600 Iout_off (Typ) (uA) 0.01 Rating Catalog open-in-new Find other Low-side switches

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 TSSOP (PW) 16 22 mm² 5 x 4.4 open-in-new Find other Low-side switches

Features

  • 600-mA Rated Drain Current (Per Channel)
  • CMOS Pin-to-Pin Improvement of 7-channel Darlington Array (For example: ULN2003A)
  • Power Efficient (Very low VOL)
    • Less Than 4 Times Lower VOL at 100 mA Than Darlington Array
  • Very Low Output Leakage < 10 nA Per Channel
  • Extended Ambient Temperature Range:
    TA = –40°C to +125°C
  • High-Voltage Outputs 30 V
  • Compatible with 1.8-V to 5-V Microcontroller and Logic Interface
  • Internal Free-wheeling Diodes for Inductive Kick-back Protection
  • Input Pull-down Resistors Allows Tri-stating the Input Driver
  • Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment
  • Inductive Load Driver Applications
  • ESD Protection Exceeds JESD 22
    • 2-kV HBM, 500-V CDM
  • Available in 16-pin SOIC and TSSOP packages

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Description

The TPL7407LA is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V–5 V).The transistors can be paralleled for higher current capability.

The TPL7407LA key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL the user is dissipating less than half the power than traditional relay drivers with currents less than 250 mA per channel.

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Technical documentation

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Type Title Date
* Data sheet TPL7407LA 30-V 7-Channel Low Side Driver datasheet (Rev. A) Mar. 28, 2018
E-book 11 Ways to Protect Your Power Path white paper Jul. 03, 2019
Application note Basics of Power Switches (Rev. A) Apr. 26, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
49
Description

The TPL7407LEVM is 7-channel relay and inductive load sink driver evaluation module that demonstrates the integrated circuit TPL7407LDR. The TPL7407LDR is a high-performance peripheral driver designed to drive loads of many types including relays, stepper motors, lamps, and light emitting diodes (...)

Features
  • Seven numbered push-buttons control input for easy basic device testing
  • Three 0.1” spaced post connector ports allow access to all input and output pins and relay contacts
  • Three open locations per channel on circuit board for user supplied components
  • Onboard relay loads can be disconnected by removing (...)

Design tools & simulation

SIMULATION MODEL Download
SLRM001.ZIP (4 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SLRM002.TSC (1476 KB) - TINA-TI Reference Design
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
24-VAC multi-channel solid state relay reference design using digital isolator
TIDA-010085 — This reference design demonstrates a multi-channel solid state relay (SSR) using a single isolation. The design uses a multi-channel digital isolator with a single isolated power supply and common ground gate-drive circuit to control multiple SSRs independently. The design is rated for 24-VAC (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 16 View options
TSSOP (PW) 16 View options

Ordering & quality

Information included:
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  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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